Lines Matching defs:scu_g6_base
53 static void __iomem *scu_g6_base;
506 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 11, 1,
512 0, scu_g6_base + ASPEED_G6_CLK_SELECTION1,
519 scu_g6_base +
529 scu_g6_base + ASPEED_G6_CLK_SELECTION4, 31, 0,
534 0, scu_g6_base + ASPEED_G6_CLK_SELECTION4, 28, 3, 0,
548 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 16, 3, 0,
557 scu_g6_base + ASPEED_MAC12_CLK_DLY, 29, 0,
565 scu_g6_base + ASPEED_MAC12_CLK_DLY, 30, 0,
578 scu_g6_base + 0x310, 24, 3, 0,
587 scu_g6_base + ASPEED_MAC34_CLK_DLY, 29, 0,
595 scu_g6_base + ASPEED_MAC34_CLK_DLY, 30, 0,
603 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 20, 3, 0,
615 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 8, 3, 0,
626 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 20, 3, 0,
636 scu_g6_base + ASPEED_G6_CLK_SELECTION2, 12, 3, 0,
644 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 28, 3, 0,
783 scu_g6_base = of_iomap(np, 0);
784 if (!scu_g6_base)
787 soc_rev = (readl(scu_g6_base + ASPEED_G6_SILICON_REV) & CHIP_REVISION_ID) >> 16;