Lines Matching refs:clkin
55 [ASPEED_CLK_GATE_REFCLK] = { 6, -1, "refclk-gate", "clkin", CLK_IS_CRITICAL },
145 return clk_hw_register_fixed_factor(NULL, name, "clkin", 0,
157 /* F = clkin * [(M+1) / (N+1)] / (P + 1) */
166 return clk_hw_register_fixed_factor(NULL, name, "clkin", 0,
509 hw = clk_hw_register_fixed_rate(NULL, "fixed-24m", "clkin",
586 u32 val, div, clkin, hpll;
600 clkin = 25000000;
603 clkin = 48000000;
606 clkin = 24000000;
609 hw = clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, clkin);
610 pr_debug("clkin @%u MHz\n", clkin / 1000000);
621 hw = clk_hw_register_fixed_rate(NULL, "hpll", "clkin", 0,
662 hw = clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, freq);
663 pr_debug("clkin @%u MHz\n", freq / 1000000);