Lines Matching refs:result
625 /* Replace the divider value and record the result */
699 u64 result;
712 * result of the pre-divider.
734 result = DIV_ROUND_CLOSEST_ULL(scaled_parent_rate, scaled_div);
736 return (unsigned long)result;
757 u64 result;
768 * result of the pre-divider.
806 result = DIV_ROUND_CLOSEST_ULL(scaled_parent_rate, best_scaled_div);
811 return (long)result;
910 /* Replace the selector value and record the result */
1056 /* Check whether any other parent clock can produce a better result */