Lines Matching refs:init
405 struct clk_init_data init;
417 init.name = name;
418 init.parent_names = &parent_name;
419 init.num_parents = 1;
420 init.ops = &sam9x60_frac_pll_ops;
421 init.flags = CLK_SET_RATE_GATE;
423 init.flags |= CLK_IS_CRITICAL;
426 frac->core.hw.init = &init;
485 struct clk_init_data init;
497 init.name = name;
498 init.parent_names = &parent_name;
499 init.num_parents = 1;
500 init.ops = &sam9x60_div_pll_ops;
501 init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
504 init.flags |= CLK_IS_CRITICAL;
507 div->core.hw.init = &init;