Lines Matching defs:pll_hw
18 static u32 owl_pll_calculate_mul(struct owl_pll_hw *pll_hw, unsigned long rate)
22 mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq);
23 if (mul < pll_hw->min_mul)
24 mul = pll_hw->min_mul;
25 else if (mul > pll_hw->max_mul)
26 mul = pll_hw->max_mul;
28 return mul &= mul_mask(pll_hw);
63 struct owl_pll_hw *pll_hw = &pll->pll_hw;
67 if (pll_hw->table) {
68 clkt = _get_pll_table(pll_hw->table, rate);
73 if (pll_hw->width == 0)
74 return pll_hw->bfreq;
76 mul = owl_pll_calculate_mul(pll_hw, rate);
78 return pll_hw->bfreq * mul;
85 struct owl_pll_hw *pll_hw = &pll->pll_hw;
89 if (pll_hw->table) {
90 regmap_read(common->regmap, pll_hw->reg, &val);
92 val = val >> pll_hw->shift;
93 val &= mul_mask(pll_hw);
95 return _get_table_rate(pll_hw->table, val);
99 if (pll_hw->width == 0)
100 return pll_hw->bfreq;
102 regmap_read(common->regmap, pll_hw->reg, &val);
104 val = val >> pll_hw->shift;
105 val &= mul_mask(pll_hw);
107 return pll_hw->bfreq * val;
113 struct owl_pll_hw *pll_hw = &pll->pll_hw;
117 regmap_read(common->regmap, pll_hw->reg, ®);
119 return !!(reg & BIT(pll_hw->bit_idx));
123 const struct owl_pll_hw *pll_hw, bool enable)
127 regmap_read(common->regmap, pll_hw->reg, ®);
130 reg |= BIT(pll_hw->bit_idx);
132 reg &= ~BIT(pll_hw->bit_idx);
134 regmap_write(common->regmap, pll_hw->reg, reg);
142 owl_pll_set(common, &pll->pll_hw, true);
152 owl_pll_set(common, &pll->pll_hw, false);
159 struct owl_pll_hw *pll_hw = &pll->pll_hw;
165 if (pll_hw->width == 0)
168 if (pll_hw->table) {
169 clkt = _get_pll_table(pll_hw->table, rate);
172 val = owl_pll_calculate_mul(pll_hw, rate);
175 regmap_read(common->regmap, pll_hw->reg, ®);
177 reg &= ~mul_mask(pll_hw);
178 reg |= val << pll_hw->shift;
180 regmap_write(common->regmap, pll_hw->reg, reg);
182 udelay(pll_hw->delay);