Lines Matching refs:CCR2
270 #define CCR2 0x2e
2890 * BGR[9..8] contained in CCR2[7..6]
2897 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2899 write_reg(info, (unsigned char) (channel + CCR2), val);
2953 /* CCR2 (Channel B)
2966 write_reg(info, CHB + CCR2, 0x38);
2968 write_reg(info, CHB + CCR2, 0x30);
3000 /* CCR2:04 SSEL Clock source select, 1=submode b */
3001 val = read_reg(info, CHA + CCR2) | (BIT4 | BIT5);
3002 write_reg(info, CHA + CCR2, val);
3113 /* CCR2
3135 write_reg(info, CHA + CCR2, val);
3440 /* CCR2 (channel A)
3452 write_reg(info, CHA + CCR2, 0x10);