Lines Matching refs:agp_bridge
29 pci_read_config_byte(agp_bridge->dev, SIS_APSIZE, &temp_size);
30 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
31 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
35 agp_bridge->previous_size =
36 agp_bridge->current_size = (void *) (values + i);
38 agp_bridge->aperture_size_idx = i;
48 pci_write_config_byte(agp_bridge->dev, SIS_TLBFLUSH, 0x02);
55 current_size = A_SIZE_8(agp_bridge->current_size);
56 pci_write_config_byte(agp_bridge->dev, SIS_TLBCNTRL, 0x05);
57 agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
59 pci_write_config_dword(agp_bridge->dev, SIS_ATTBASE,
60 agp_bridge->gatt_bus_addr);
61 pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
70 previous_size = A_SIZE_8(agp_bridge->previous_size);
71 pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
81 dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
82 agp_bridge->major_version, agp_bridge->minor_version);
84 pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + PCI_AGP_STATUS, &command);
94 dev_info(&agp_bridge->dev->dev, "putting AGP V3 device at %s into %dx mode\n",
105 dev_info(&agp_bridge->dev->dev, "SiS delay workaround: giving bridge time to recover\n");
169 if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5