Lines Matching defs:nvidia_private
35 } nvidia_private;
123 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_APBASE, apbase);
124 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_APLIMIT, aplimit);
125 pci_write_config_dword(nvidia_private.dev_3, NVIDIA_3_APBASE, apbase);
126 pci_write_config_dword(nvidia_private.dev_3, NVIDIA_3_APLIMIT, aplimit);
132 nvidia_private.num_active_entries = current_size->num_entries;
133 nvidia_private.pg_offset = 0;
136 nvidia_private.num_active_entries /= (64 / current_size->size);
137 nvidia_private.pg_offset = (apbase & (64 * 1024 * 1024 - 1) &
143 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_ATTBASE(i),
148 pci_read_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, &temp);
149 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp | 0x11);
157 nvidia_private.aperture =
160 if (!nvidia_private.aperture)
176 pci_read_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, &temp);
177 pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp & ~(0x11));
180 iounmap((void __iomem *) nvidia_private.aperture);
214 (nvidia_private.num_active_entries - agp_memory_reserved/PAGE_SIZE))
218 if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j)))
229 agp_bridge->gatt_table+nvidia_private.pg_offset+j);
233 readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j - 1);
254 writel(agp_bridge->scratch_page, agp_bridge->gatt_table+nvidia_private.pg_offset+i);
268 if (nvidia_private.wbc_mask) {
269 pci_read_config_dword(nvidia_private.dev_1, NVIDIA_1_WBC, &wbc_reg);
270 wbc_reg |= nvidia_private.wbc_mask;
271 pci_write_config_dword(nvidia_private.dev_1, NVIDIA_1_WBC, wbc_reg);
275 pci_read_config_dword(nvidia_private.dev_1,
281 } while (wbc_reg & nvidia_private.wbc_mask);
286 temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
288 temp = readl(nvidia_private.aperture+(i * PAGE_SIZE / sizeof(u32)));
342 nvidia_private.dev_1 =
346 nvidia_private.dev_2 =
350 nvidia_private.dev_3 =
355 if (!nvidia_private.dev_1 || !nvidia_private.dev_2 || !nvidia_private.dev_3) {
368 nvidia_private.wbc_mask = 0x00010000;
372 nvidia_private.wbc_mask = 0x80000000;
385 bridge->dev_private_data = &nvidia_private;
472 pci_dev_put(nvidia_private.dev_1);
473 pci_dev_put(nvidia_private.dev_2);
474 pci_dev_put(nvidia_private.dev_3);