Lines Matching refs:amd_irongate_private
35 } amd_irongate_private;
68 tables = amd_irongate_private.gatt_pages;
69 for (i = 0; i < amd_irongate_private.num_tables; i++) {
78 amd_irongate_private.gatt_pages = NULL;
104 amd_irongate_private.num_tables = i;
105 amd_irongate_private.gatt_pages = tables;
121 #define GET_GATT(addr) (amd_irongate_private.gatt_pages[\
158 writel(virt_to_phys(amd_irongate_private.gatt_pages[i]->real) | 1,
216 if (!amd_irongate_private.registers) {
219 amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(reg, 4096);
220 if (!amd_irongate_private.registers)
225 writel(agp_bridge->gatt_bus_addr, amd_irongate_private.registers+AMD_ATTBASE);
226 readl(amd_irongate_private.registers+AMD_ATTBASE); /* PCI Posting. */
235 enable_reg = readw(amd_irongate_private.registers+AMD_GARTENABLE);
237 writew(enable_reg, amd_irongate_private.registers+AMD_GARTENABLE);
238 readw(amd_irongate_private.registers+AMD_GARTENABLE); /* PCI Posting. */
246 writel(1, amd_irongate_private.registers+AMD_TLBFLUSH);
247 readl(amd_irongate_private.registers+AMD_TLBFLUSH); /* PCI Posting.*/
259 enable_reg = readw(amd_irongate_private.registers+AMD_GARTENABLE);
261 writew(enable_reg, amd_irongate_private.registers+AMD_GARTENABLE);
262 readw(amd_irongate_private.registers+AMD_GARTENABLE); /* PCI Posting. */
268 iounmap((void __iomem *) amd_irongate_private.registers);
281 writel(1, amd_irongate_private.registers+AMD_TLBFLUSH);
282 readl(amd_irongate_private.registers+AMD_TLBFLUSH); /* PCI Posting. */
428 bridge->dev_private_data = &amd_irongate_private;