Lines Matching refs:ddata
58 struct sysc *ddata;
158 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
161 static void sysc_write(struct sysc *ddata, int offset, u32 value)
163 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
164 writew_relaxed(value & 0xffff, ddata->module_va + offset);
167 if (ddata->offsets[SYSC_REVISION] >= 0 &&
168 offset == ddata->offsets[SYSC_REVISION]) {
171 writew_relaxed(hi, ddata->module_va + offset + 4);
177 writel_relaxed(value, ddata->module_va + offset);
180 static u32 sysc_read(struct sysc *ddata, int offset)
182 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
185 val = readw_relaxed(ddata->module_va + offset);
188 if (ddata->offsets[SYSC_REVISION] >= 0 &&
189 offset == ddata->offsets[SYSC_REVISION]) {
190 u16 tmp = readw_relaxed(ddata->module_va + offset + 4);
198 return readl_relaxed(ddata->module_va + offset);
201 static bool sysc_opt_clks_needed(struct sysc *ddata)
203 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
206 static u32 sysc_read_revision(struct sysc *ddata)
208 int offset = ddata->offsets[SYSC_REVISION];
213 return sysc_read(ddata, offset);
216 static u32 sysc_read_sysconfig(struct sysc *ddata)
218 int offset = ddata->offsets[SYSC_SYSCONFIG];
223 return sysc_read(ddata, offset);
226 static u32 sysc_read_sysstatus(struct sysc *ddata)
228 int offset = ddata->offsets[SYSC_SYSSTATUS];
233 return sysc_read(ddata, offset);
236 static int sysc_poll_reset_sysstatus(struct sysc *ddata)
241 if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED)
244 syss_done = ddata->cfg.syss_mask;
247 error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata,
248 rstval, (rstval & ddata->cfg.syss_mask) ==
253 rstval = sysc_read_sysstatus(ddata);
254 if ((rstval & ddata->cfg.syss_mask) == syss_done)
264 static int sysc_poll_reset_sysconfig(struct sysc *ddata)
269 sysc_mask = BIT(ddata->cap->regbits->srst_shift);
272 error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata,
278 rstval = sysc_read_sysconfig(ddata);
290 static int sysc_wait_softreset(struct sysc *ddata)
294 if (ddata->cap->regbits->srst_shift < 0)
297 syss_offset = ddata->offsets[SYSC_SYSSTATUS];
300 error = sysc_poll_reset_sysstatus(ddata);
301 else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS)
302 error = sysc_poll_reset_sysconfig(ddata);
307 static int sysc_add_named_clock_from_child(struct sysc *ddata,
311 struct device_node *np = ddata->dev->of_node;
334 clock = devm_get_clk_from_child(ddata->dev, child, name);
348 cl->dev_id = dev_name(ddata->dev);
357 static int sysc_init_ext_opt_clock(struct sysc *ddata, const char *name)
362 if (ddata->nr_clocks < SYSC_OPTFCK0)
365 index = ddata->nr_clocks;
372 error = sysc_add_named_clock_from_child(ddata, name, optfck_name);
376 ddata->clock_roles[index] = optfck_name;
377 ddata->nr_clocks++;
382 static int sysc_get_one_clock(struct sysc *ddata, const char *name)
393 if (!ddata->clocks[i]) {
401 dev_err(ddata->dev, "clock %s not added\n", name);
405 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
406 if (IS_ERR(ddata->clocks[index])) {
407 dev_err(ddata->dev, "clock get error for %s: %li\n",
408 name, PTR_ERR(ddata->clocks[index]));
410 return PTR_ERR(ddata->clocks[index]);
413 error = clk_prepare(ddata->clocks[index]);
415 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
424 static int sysc_get_clocks(struct sysc *ddata)
426 struct device_node *np = ddata->dev->of_node;
431 ddata->clock_roles = devm_kcalloc(ddata->dev,
433 sizeof(*ddata->clock_roles),
435 if (!ddata->clock_roles)
443 ddata->clock_roles[ddata->nr_clocks] = name;
444 ddata->nr_clocks++;
447 if (ddata->nr_clocks < 1)
450 if ((ddata->cfg.quirks & SYSC_QUIRK_EXT_OPT_CLOCK)) {
451 error = sysc_init_ext_opt_clock(ddata, NULL);
456 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
457 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
463 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
470 ddata->nr_clocks++;
472 ddata->nr_clocks++;
474 ddata->clocks = devm_kcalloc(ddata->dev,
475 ddata->nr_clocks, sizeof(*ddata->clocks),
477 if (!ddata->clocks)
481 const char *name = ddata->clock_roles[i];
486 error = sysc_get_one_clock(ddata, name);
494 static int sysc_enable_main_clocks(struct sysc *ddata)
499 if (!ddata->clocks)
503 clock = ddata->clocks[i];
518 clock = ddata->clocks[i];
530 static void sysc_disable_main_clocks(struct sysc *ddata)
535 if (!ddata->clocks)
539 clock = ddata->clocks[i];
547 static int sysc_enable_opt_clocks(struct sysc *ddata)
552 if (!ddata->clocks || ddata->nr_clocks < SYSC_OPTFCK0 + 1)
556 clock = ddata->clocks[i];
571 clock = ddata->clocks[i];
581 static void sysc_disable_opt_clocks(struct sysc *ddata)
586 if (!ddata->clocks || ddata->nr_clocks < SYSC_OPTFCK0 + 1)
590 clock = ddata->clocks[i];
600 static void sysc_clkdm_deny_idle(struct sysc *ddata)
604 if (ddata->legacy_mode || (ddata->cfg.quirks & SYSC_QUIRK_CLKDM_NOAUTO))
607 pdata = dev_get_platdata(ddata->dev);
609 pdata->clkdm_deny_idle(ddata->dev, &ddata->cookie);
612 static void sysc_clkdm_allow_idle(struct sysc *ddata)
616 if (ddata->legacy_mode || (ddata->cfg.quirks & SYSC_QUIRK_CLKDM_NOAUTO))
619 pdata = dev_get_platdata(ddata->dev);
621 pdata->clkdm_allow_idle(ddata->dev, &ddata->cookie);
626 * @ddata: device driver data
630 static int sysc_init_resets(struct sysc *ddata)
632 ddata->rsts =
633 devm_reset_control_get_optional_shared(ddata->dev, "rstctrl");
635 return PTR_ERR_OR_ZERO(ddata->rsts);
640 * @ddata: device driver data
647 static int sysc_parse_and_check_child_range(struct sysc *ddata)
649 struct device_node *np = ddata->dev->of_node;
656 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
664 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
678 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
684 ddata->module_pa = of_translate_address(np, ranges++);
685 ddata->module_size = be32_to_cpup(ranges);
706 * @ddata: device driver data
712 static int sysc_defer_non_critical(struct sysc *ddata)
722 if (ddata->module_pa >= res->start &&
723 ddata->module_pa <= res->end) {
737 static void sysc_init_stdout_path(struct sysc *ddata)
768 static void sysc_check_quirk_stdout(struct sysc *ddata,
771 sysc_init_stdout_path(ddata);
775 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
781 * @ddata: device driver data
788 static void sysc_check_one_child(struct sysc *ddata,
795 dev_warn(ddata->dev, "really a child ti,hwmods property?");
797 sysc_check_quirk_stdout(ddata, np);
798 sysc_parse_dts_quirks(ddata, np, true);
801 static void sysc_check_children(struct sysc *ddata)
805 for_each_child_of_node(ddata->dev->of_node, child)
806 sysc_check_one_child(ddata, child);
815 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
818 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
823 * @ddata: device driver data
826 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
841 res = platform_get_resource_byname(to_platform_device(ddata->dev),
844 ddata->offsets[reg] = -ENODEV;
849 ddata->offsets[reg] = res->start - ddata->module_pa;
851 sysc_check_quirk_16bit(ddata, res);
856 static int sysc_parse_registers(struct sysc *ddata)
861 error = sysc_parse_one(ddata, i);
871 * @ddata: device driver data
873 static int sysc_check_registers(struct sysc *ddata)
878 if (ddata->offsets[i] < 0)
881 if (ddata->offsets[i] > (ddata->module_size - 4)) {
882 dev_err(ddata->dev, "register outside module range");
888 if (ddata->offsets[j] < 0)
891 if (ddata->offsets[i] == ddata->offsets[j])
898 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
909 * @ddata: device driver data
918 static int sysc_ioremap(struct sysc *ddata)
922 if (ddata->offsets[SYSC_REVISION] < 0 &&
923 ddata->offsets[SYSC_SYSCONFIG] < 0 &&
924 ddata->offsets[SYSC_SYSSTATUS] < 0) {
925 size = ddata->module_size;
927 size = max3(ddata->offsets[SYSC_REVISION],
928 ddata->offsets[SYSC_SYSCONFIG],
929 ddata->offsets[SYSC_SYSSTATUS]);
934 if ((size + sizeof(u32)) > ddata->module_size)
935 size = ddata->module_size;
938 ddata->module_va = devm_ioremap(ddata->dev,
939 ddata->module_pa,
941 if (!ddata->module_va)
949 * @ddata: device driver data
951 static int sysc_map_and_check_registers(struct sysc *ddata)
955 error = sysc_parse_and_check_child_range(ddata);
959 error = sysc_defer_non_critical(ddata);
963 sysc_check_children(ddata);
965 error = sysc_parse_registers(ddata);
969 error = sysc_ioremap(ddata);
973 error = sysc_check_registers(ddata);
983 * @ddata: device driver data
985 static int sysc_show_rev(char *bufp, struct sysc *ddata)
989 if (ddata->offsets[SYSC_REVISION] < 0)
992 len = sprintf(bufp, ":%08x", ddata->revision);
997 static int sysc_show_reg(struct sysc *ddata,
1000 if (ddata->offsets[reg] < 0)
1003 return sprintf(bufp, ":%x", ddata->offsets[reg]);
1006 static int sysc_show_name(char *bufp, struct sysc *ddata)
1008 if (!ddata->name)
1011 return sprintf(bufp, ":%s", ddata->name);
1016 * @ddata: device driver data
1018 static void sysc_show_registers(struct sysc *ddata)
1025 bufp += sysc_show_reg(ddata, bufp, i);
1027 bufp += sysc_show_rev(bufp, ddata);
1028 bufp += sysc_show_name(bufp, ddata);
1030 dev_dbg(ddata->dev, "%llx:%x%s\n",
1031 ddata->module_pa, ddata->module_size,
1037 * @ddata: device driver data
1040 static void sysc_write_sysconfig(struct sysc *ddata, u32 value)
1042 if (ddata->module_unlock_quirk)
1043 ddata->module_unlock_quirk(ddata);
1045 sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], value);
1047 if (ddata->module_lock_quirk)
1048 ddata->module_lock_quirk(ddata);
1057 struct sysc *ddata;
1062 ddata = dev_get_drvdata(dev);
1068 if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET) {
1069 error = sysc_enable_opt_clocks(ddata);
1071 dev_err(ddata->dev,
1081 if (!(ddata->cfg.quirks & SYSC_MODULE_QUIRK_ENA_RESETDONE)) {
1082 error = sysc_wait_softreset(ddata);
1084 dev_warn(ddata->dev, "OCP softreset timed out\n");
1086 if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
1087 sysc_disable_opt_clocks(ddata);
1094 if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
1097 regbits = ddata->cap->regbits;
1098 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1106 (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT))
1110 idlemodes = ddata->cfg.sidlemodes;
1114 if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE |
1120 ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
1123 best_mode = fls(ddata->cfg.sidlemodes) - 1;
1131 ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
1137 sysc_write_sysconfig(ddata, reg);
1141 idlemodes = ddata->cfg.midlemodes;
1145 best_mode = fls(ddata->cfg.midlemodes) - 1;
1151 if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
1156 sysc_write_sysconfig(ddata, reg);
1161 ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) {
1163 sysc_write_sysconfig(ddata, reg);
1167 sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1169 if (ddata->module_enable_quirk)
1170 ddata->module_enable_quirk(ddata);
1192 struct sysc *ddata;
1197 ddata = dev_get_drvdata(dev);
1198 if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
1201 if (ddata->module_disable_quirk)
1202 ddata->module_disable_quirk(ddata);
1204 regbits = ddata->cap->regbits;
1205 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1208 idlemodes = ddata->cfg.midlemodes;
1218 if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_MSTANDBY) ||
1219 ddata->cfg.quirks & (SYSC_QUIRK_FORCE_MSTANDBY))
1224 sysc_write_sysconfig(ddata, reg);
1228 idlemodes = ddata->cfg.sidlemodes;
1232 if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE) {
1242 if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT) {
1245 ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
1252 ddata->cfg.sysc_val & BIT(regbits->autoidle_shift))
1254 sysc_write_sysconfig(ddata, reg);
1257 sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1263 struct sysc *ddata)
1268 pdata = dev_get_platdata(ddata->dev);
1275 error = pdata->idle_module(dev, &ddata->cookie);
1280 reset_control_assert(ddata->rsts);
1286 struct sysc *ddata)
1291 pdata = dev_get_platdata(ddata->dev);
1298 error = pdata->enable_module(dev, &ddata->cookie);
1303 reset_control_deassert(ddata->rsts);
1310 struct sysc *ddata;
1313 ddata = dev_get_drvdata(dev);
1315 if (!ddata->enabled)
1318 sysc_clkdm_deny_idle(ddata);
1320 if (ddata->legacy_mode) {
1321 error = sysc_runtime_suspend_legacy(dev, ddata);
1330 sysc_disable_main_clocks(ddata);
1332 if (sysc_opt_clks_needed(ddata))
1333 sysc_disable_opt_clocks(ddata);
1335 ddata->enabled = false;
1338 reset_control_assert(ddata->rsts);
1340 sysc_clkdm_allow_idle(ddata);
1347 struct sysc *ddata;
1350 ddata = dev_get_drvdata(dev);
1352 if (ddata->enabled)
1356 sysc_clkdm_deny_idle(ddata);
1358 if (sysc_opt_clks_needed(ddata)) {
1359 error = sysc_enable_opt_clocks(ddata);
1364 error = sysc_enable_main_clocks(ddata);
1368 reset_control_deassert(ddata->rsts);
1370 if (ddata->legacy_mode) {
1371 error = sysc_runtime_resume_legacy(dev, ddata);
1380 ddata->enabled = true;
1382 sysc_clkdm_allow_idle(ddata);
1387 sysc_disable_main_clocks(ddata);
1389 if (sysc_opt_clks_needed(ddata))
1390 sysc_disable_opt_clocks(ddata);
1392 sysc_clkdm_allow_idle(ddata);
1397 static int sysc_reinit_module(struct sysc *ddata, bool leave_enabled)
1399 struct device *dev = ddata->dev;
1403 if (ddata->enabled) {
1427 struct sysc *ddata;
1429 ddata = dev_get_drvdata(dev);
1431 if (ddata->cfg.quirks &
1435 if (!ddata->enabled)
1438 ddata->needs_resume = 1;
1445 struct sysc *ddata;
1448 ddata = dev_get_drvdata(dev);
1450 if (ddata->cfg.quirks &
1454 if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_RESUME) {
1455 error = sysc_reinit_module(ddata, ddata->needs_resume);
1458 } else if (ddata->needs_resume) {
1464 ddata->needs_resume = 0;
1665 static void sysc_init_early_quirks(struct sysc *ddata)
1676 if (q->base != ddata->module_pa)
1679 if (q->rev_offset != ddata->offsets[SYSC_REVISION])
1682 if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
1685 if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
1688 ddata->name = q->name;
1689 ddata->cfg.quirks |= q->quirks;
1694 static void sysc_init_revision_quirks(struct sysc *ddata)
1702 if (q->base && q->base != ddata->module_pa)
1705 if (q->rev_offset != ddata->offsets[SYSC_REVISION])
1708 if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
1711 if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
1714 if (q->revision == ddata->revision ||
1716 (ddata->revision & q->revision_mask)) {
1717 ddata->name = q->name;
1718 ddata->cfg.quirks |= q->quirks;
1728 static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset,
1759 devm_iounmap(ddata->dev, ddata->module_va);
1760 ddata->module_va = devm_ioremap(ddata->dev,
1761 ddata->module_pa,
1762 ddata->module_size);
1763 if (!ddata->module_va)
1767 val = sysc_read(ddata, dispc_offset + 0x40);
1779 sysc_write(ddata, dispc_offset + 0x40,
1786 val = sysc_read(ddata, dispc_offset + 0x238);
1791 sysc_write(ddata, dispc_offset + 0x238,
1798 val = sysc_read(ddata, dispc_offset + 0x848);
1803 sysc_write(ddata, dispc_offset + 0x848,
1810 static void sysc_pre_reset_quirk_dss(struct sysc *ddata)
1817 irq_mask = sysc_quirk_dispc(ddata, dispc_offset, false);
1822 sysc_write(ddata, dispc_offset + 0x18, irq_mask);
1825 val = sysc_quirk_dispc(ddata, dispc_offset, true);
1828 error = readl_poll_timeout(ddata->module_va + dispc_offset + 0x18,
1831 dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n",
1836 sysc_write(ddata, 0x44, 0);
1839 sysc_write(ddata, 0x48, 0);
1843 sysc_write(ddata, 0x40, 0);
1847 static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata)
1852 val = sysc_read(ddata, offset);
1854 sysc_write(ddata, offset, val);
1858 static void sysc_module_enable_quirk_aess(struct sysc *ddata)
1862 sysc_write(ddata, offset, 1);
1866 static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable)
1872 if ((ddata->revision & 0xffffff00) == 0x001f0000)
1878 val = sysc_read(ddata, offset);
1883 sysc_write(ddata, offset, val);
1886 static void sysc_pre_reset_quirk_i2c(struct sysc *ddata)
1888 sysc_clk_quirk_i2c(ddata, false);
1891 static void sysc_post_reset_quirk_i2c(struct sysc *ddata)
1893 sysc_clk_quirk_i2c(ddata, true);
1897 static void sysc_quirk_rtc(struct sysc *ddata, bool lock)
1910 error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val,
1913 dev_warn(ddata->dev, "rtc busy timeout\n");
1915 sysc_write(ddata, 0x6c, kick0_val);
1916 sysc_write(ddata, 0x70, kick1_val);
1920 static void sysc_module_unlock_quirk_rtc(struct sysc *ddata)
1922 sysc_quirk_rtc(ddata, false);
1925 static void sysc_module_lock_quirk_rtc(struct sysc *ddata)
1927 sysc_quirk_rtc(ddata, true);
1931 static void sysc_module_enable_quirk_sgx(struct sysc *ddata)
1936 sysc_write(ddata, offset, val);
1940 static void sysc_reset_done_quirk_wdt(struct sysc *ddata)
1948 sysc_write(ddata, spr, 0xaaaa);
1949 error = readl_poll_timeout(ddata->module_va + wps, val,
1953 dev_warn(ddata->dev, "wdt disable step1 failed\n");
1955 sysc_write(ddata, spr, 0x5555);
1956 error = readl_poll_timeout(ddata->module_va + wps, val,
1960 dev_warn(ddata->dev, "wdt disable step2 failed\n");
1964 static void sysc_module_disable_quirk_pruss(struct sysc *ddata)
1968 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1970 sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg);
1973 static void sysc_init_module_quirks(struct sysc *ddata)
1975 if (ddata->legacy_mode || !ddata->name)
1978 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) {
1979 ddata->pre_reset_quirk = sysc_pre_reset_quirk_hdq1w;
1985 if (ddata->cfg.quirks & SYSC_QUIRK_GPMC_DEBUG) {
1986 ddata->cfg.quirks |= SYSC_QUIRK_NO_RESET_ON_INIT;
1992 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_I2C) {
1993 ddata->pre_reset_quirk = sysc_pre_reset_quirk_i2c;
1994 ddata->post_reset_quirk = sysc_post_reset_quirk_i2c;
1999 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_AESS)
2000 ddata->module_enable_quirk = sysc_module_enable_quirk_aess;
2002 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_DSS_RESET)
2003 ddata->pre_reset_quirk = sysc_pre_reset_quirk_dss;
2005 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_RTC_UNLOCK) {
2006 ddata->module_unlock_quirk = sysc_module_unlock_quirk_rtc;
2007 ddata->module_lock_quirk = sysc_module_lock_quirk_rtc;
2012 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX)
2013 ddata->module_enable_quirk = sysc_module_enable_quirk_sgx;
2015 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_WDT) {
2016 ddata->reset_done_quirk = sysc_reset_done_quirk_wdt;
2017 ddata->module_disable_quirk = sysc_reset_done_quirk_wdt;
2020 if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS)
2021 ddata->module_disable_quirk = sysc_module_disable_quirk_pruss;
2024 static int sysc_clockdomain_init(struct sysc *ddata)
2026 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
2033 switch (ddata->nr_clocks) {
2035 ick = ddata->clocks[SYSC_ICK];
2038 fck = ddata->clocks[SYSC_FCK];
2044 error = pdata->init_clockdomain(ddata->dev, fck, ick, &ddata->cookie);
2056 static int sysc_legacy_init(struct sysc *ddata)
2058 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
2064 error = pdata->init_module(ddata->dev, ddata->mdata, &ddata->cookie);
2075 static int sysc_reset(struct sysc *ddata)
2080 sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
2082 if (ddata->legacy_mode ||
2083 ddata->cap->regbits->srst_shift < 0 ||
2084 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
2087 sysc_mask = BIT(ddata->cap->regbits->srst_shift);
2089 if (ddata->pre_reset_quirk)
2090 ddata->pre_reset_quirk(ddata);
2093 sysc_val = sysc_read_sysconfig(ddata);
2095 sysc_write(ddata, sysc_offset, sysc_val);
2102 if (ddata->cfg.srst_udelay)
2103 fsleep(ddata->cfg.srst_udelay);
2110 sysc_val = sysc_read_sysconfig(ddata);
2113 if (ddata->post_reset_quirk)
2114 ddata->post_reset_quirk(ddata);
2116 error = sysc_wait_softreset(ddata);
2118 dev_warn(ddata->dev, "OCP softreset timed out\n");
2120 if (ddata->reset_done_quirk)
2121 ddata->reset_done_quirk(ddata);
2132 static int sysc_init_module(struct sysc *ddata)
2136 error = sysc_clockdomain_init(ddata);
2140 sysc_clkdm_deny_idle(ddata);
2146 error = sysc_enable_opt_clocks(ddata);
2150 error = sysc_enable_main_clocks(ddata);
2154 if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) {
2155 error = reset_control_deassert(ddata->rsts);
2160 ddata->revision = sysc_read_revision(ddata);
2161 sysc_init_revision_quirks(ddata);
2162 sysc_init_module_quirks(ddata);
2164 if (ddata->legacy_mode) {
2165 error = sysc_legacy_init(ddata);
2170 if (!ddata->legacy_mode) {
2171 error = sysc_enable_module(ddata->dev);
2176 error = sysc_reset(ddata);
2178 dev_err(ddata->dev, "Reset failed with %d\n", error);
2180 if (error && !ddata->legacy_mode)
2181 sysc_disable_module(ddata->dev);
2184 if (error && !(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT))
2185 reset_control_assert(ddata->rsts);
2189 sysc_disable_main_clocks(ddata);
2193 sysc_disable_opt_clocks(ddata);
2194 sysc_clkdm_allow_idle(ddata);
2200 static int sysc_init_sysc_mask(struct sysc *ddata)
2202 struct device_node *np = ddata->dev->of_node;
2210 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
2215 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
2218 struct device_node *np = ddata->dev->of_node;
2225 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
2234 static int sysc_init_idlemodes(struct sysc *ddata)
2238 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
2243 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
2258 static int sysc_init_syss_mask(struct sysc *ddata)
2260 struct device_node *np = ddata->dev->of_node;
2266 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
2267 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
2268 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
2269 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
2274 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
2275 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
2277 ddata->cfg.syss_mask = val;
2286 static int sysc_child_add_named_clock(struct sysc *ddata,
2303 clk = clk_get(ddata->dev, name);
2316 static int sysc_child_add_clocks(struct sysc *ddata,
2321 for (i = 0; i < ddata->nr_clocks; i++) {
2322 error = sysc_child_add_named_clock(ddata,
2324 ddata->clock_roles[i]);
2326 dev_err(ddata->dev, "could not add child clock %s: %i\n",
2327 ddata->clock_roles[i], error);
2351 struct sysc *ddata;
2354 ddata = sysc_child_to_parent(dev);
2360 if (!ddata->enabled)
2363 return sysc_runtime_suspend(ddata->dev);
2368 struct sysc *ddata;
2371 ddata = sysc_child_to_parent(dev);
2373 if (!ddata->enabled) {
2374 error = sysc_runtime_resume(ddata->dev);
2376 dev_err(ddata->dev,
2386 struct sysc *ddata;
2389 ddata = sysc_child_to_parent(dev);
2391 dev_dbg(ddata->dev, "%s %s\n", __func__,
2392 ddata->name ? ddata->name : "");
2411 error = sysc_runtime_suspend(ddata->dev);
2419 ddata->child_needs_resume = true;
2427 struct sysc *ddata;
2430 ddata = sysc_child_to_parent(dev);
2432 dev_dbg(ddata->dev, "%s %s\n", __func__,
2433 ddata->name ? ddata->name : "");
2435 if (ddata->child_needs_resume) {
2436 ddata->child_needs_resume = false;
2438 error = sysc_runtime_resume(ddata->dev);
2440 dev_err(ddata->dev,
2446 dev_err(ddata->dev,
2471 struct sysc *ddata;
2475 ddata = module->ddata;
2476 sysc_reinit_module(ddata, ddata->enabled);
2512 * @ddata: device data
2514 static void sysc_add_restored(struct sysc *ddata)
2522 restored_module->ddata = ddata;
2540 * @ddata: device driver data
2551 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
2553 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
2561 struct sysc *ddata;
2564 ddata = sysc_child_to_parent(dev);
2565 if (!ddata)
2570 error = sysc_child_add_clocks(ddata, dev);
2573 sysc_legacy_idle_quirk(ddata, dev);
2601 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
2614 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
2616 dev_warn(ddata->dev,
2623 static int sysc_init_dts_quirks(struct sysc *ddata)
2625 struct device_node *np = ddata->dev->of_node;
2629 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
2631 sysc_parse_dts_quirks(ddata, np, false);
2635 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
2639 ddata->cfg.srst_udelay = (u8)val;
2645 static void sysc_unprepare(struct sysc *ddata)
2649 if (!ddata->clocks)
2653 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
2654 clk_unprepare(ddata->clocks[i]);
2905 static int sysc_init_pdata(struct sysc *ddata)
2907 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
2913 mdata = devm_kzalloc(ddata->dev, sizeof(*mdata), GFP_KERNEL);
2917 if (ddata->legacy_mode) {
2918 mdata->name = ddata->legacy_mode;
2919 mdata->module_pa = ddata->module_pa;
2920 mdata->module_size = ddata->module_size;
2921 mdata->offsets = ddata->offsets;
2923 mdata->cap = ddata->cap;
2924 mdata->cfg = &ddata->cfg;
2927 ddata->mdata = mdata;
2932 static int sysc_init_match(struct sysc *ddata)
2936 cap = of_device_get_match_data(ddata->dev);
2940 ddata->cap = cap;
2941 if (ddata->cap)
2942 ddata->cfg.quirks |= ddata->cap->mod_quirks;
2949 struct sysc *ddata;
2951 ddata = container_of(work, struct sysc, idle_work.work);
2959 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE |
2961 sysc_disable_main_clocks(ddata);
2962 sysc_disable_opt_clocks(ddata);
2963 sysc_clkdm_allow_idle(ddata);
2967 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE)
2974 if (pm_runtime_active(ddata->dev))
2975 pm_runtime_put_sync(ddata->dev);
3042 * so ddata is only used for SoC type. This can be called from module_init
3045 static int sysc_init_static_data(struct sysc *ddata)
3063 pdata = dev_get_platdata(ddata->dev);
3133 static int sysc_check_disabled_devices(struct sysc *ddata)
3142 if (ddata->module_pa == disabled_module->base) {
3143 dev_dbg(ddata->dev, "module disabled for this SoC\n");
3158 static int sysc_check_active_timer(struct sysc *ddata)
3162 if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
3163 ddata->cap->type != TI_SYSC_OMAP4_TIMER)
3178 if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
3179 (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
3193 struct sysc *ddata;
3196 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
3197 if (!ddata)
3200 ddata->dev = &pdev->dev;
3201 platform_set_drvdata(pdev, ddata);
3203 error = sysc_init_static_data(ddata);
3207 error = sysc_init_match(ddata);
3211 error = sysc_init_dts_quirks(ddata);
3215 error = sysc_map_and_check_registers(ddata);
3219 error = sysc_init_sysc_mask(ddata);
3223 error = sysc_init_idlemodes(ddata);
3227 error = sysc_init_syss_mask(ddata);
3231 error = sysc_init_pdata(ddata);
3235 sysc_init_early_quirks(ddata);
3237 error = sysc_check_disabled_devices(ddata);
3241 error = sysc_check_active_timer(ddata);
3243 ddata->reserved = true;
3247 error = sysc_get_clocks(ddata);
3251 error = sysc_init_resets(ddata);
3255 error = sysc_init_module(ddata);
3259 pm_runtime_enable(ddata->dev);
3260 error = pm_runtime_get_sync(ddata->dev);
3262 pm_runtime_put_noidle(ddata->dev);
3263 pm_runtime_disable(ddata->dev);
3268 if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT))
3269 reset_control_assert(ddata->rsts);
3271 if (!(ddata->cfg.quirks &
3273 sysc_disable_main_clocks(ddata);
3274 sysc_disable_opt_clocks(ddata);
3275 sysc_clkdm_allow_idle(ddata);
3278 sysc_show_registers(ddata);
3280 ddata->dev->type = &sysc_device_type;
3282 if (!ddata->reserved) {
3283 error = of_platform_populate(ddata->dev->of_node,
3286 ddata->dev);
3291 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
3294 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE |
3297 schedule_delayed_work(&ddata->idle_work, 3000);
3302 if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_CTX_LOST)
3303 sysc_add_restored(ddata);
3311 sysc_unprepare(ddata);
3318 struct sysc *ddata = platform_get_drvdata(pdev);
3322 if (cancel_delayed_work_sync(&ddata->idle_work))
3323 ti_sysc_idle(&ddata->idle_work.work);
3325 error = pm_runtime_get_sync(ddata->dev);
3327 pm_runtime_put_noidle(ddata->dev);
3328 pm_runtime_disable(ddata->dev);
3337 if (!reset_control_status(ddata->rsts))
3338 reset_control_assert(ddata->rsts);
3341 sysc_unprepare(ddata);