Lines Matching defs:revision
112 * @revision: interconnect target module revision
143 u32 revision;
166 /* Only i2c revision has LO and HI register with stride of 4 */
187 /* Only i2c revision has LO and HI register with stride of 4 */
810 * So far only I2C uses 16-bit read access with clockactivity with revision
813 * the revision register.
981 * sysc_show_rev - read and show interconnect target module revision
992 len = sprintf(bufp, ":%08x", ddata->revision);
1476 /* Module revision register based quirks */
1483 u32 revision;
1496 .revision = (optrev_val), \
1663 * needed before the module revision can be read
1693 /* Quirks that also consider the revision register value */
1714 if (q->revision == ddata->revision ||
1715 (q->revision & q->revision_mask) ==
1716 (ddata->revision & q->revision_mask)) {
1872 if ((ddata->revision & 0xffffff00) == 0x001f0000)
2127 * At this point the module is configured enough to read the revision but
2130 * runtime based on the revision register.
2160 ddata->revision = sysc_read_revision(ddata);
3095 * device and have module revision checks working.
3167 * Quirk for omap3 beagleboard revision A to B4 to use gpt12.
3169 * dts: Fix timer regression for beagleboard revision c"). This all