Lines Matching defs:snor_timing0
49 u32 snor_timing0;
67 writel(gmi->snor_timing0, gmi->base + TEGRA_GMI_TIMING0);
166 gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(property);
168 gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(1);
171 gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(property);
173 gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(1);
176 gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(property);
178 gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(1);
181 gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(property);
183 gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(4);