Lines Matching defs:gmi
53 static int tegra_gmi_enable(struct tegra_gmi *gmi)
57 err = clk_prepare_enable(gmi->clk);
59 dev_err(gmi->dev, "failed to enable clock: %d\n", err);
63 reset_control_assert(gmi->rst);
65 reset_control_deassert(gmi->rst);
67 writel(gmi->snor_timing0, gmi->base + TEGRA_GMI_TIMING0);
68 writel(gmi->snor_timing1, gmi->base + TEGRA_GMI_TIMING1);
70 gmi->snor_config |= TEGRA_GMI_CONFIG_GO;
71 writel(gmi->snor_config, gmi->base + TEGRA_GMI_CONFIG);
76 static void tegra_gmi_disable(struct tegra_gmi *gmi)
81 config = readl(gmi->base + TEGRA_GMI_CONFIG);
83 writel(config, gmi->base + TEGRA_GMI_CONFIG);
85 reset_control_assert(gmi->rst);
86 clk_disable_unprepare(gmi->clk);
89 static int tegra_gmi_parse_dt(struct tegra_gmi *gmi)
95 child = of_get_next_available_child(gmi->dev->of_node, NULL);
97 dev_err(gmi->dev, "no child nodes found\n");
106 if (of_get_child_count(gmi->dev->of_node) > 1)
107 dev_warn(gmi->dev, "only one child device is supported.");
110 gmi->snor_config |= TEGRA_GMI_BUS_WIDTH_32BIT;
113 gmi->snor_config |= TEGRA_GMI_MUX_MODE;
116 gmi->snor_config |= TEGRA_GMI_RDY_BEFORE_DATA;
119 gmi->snor_config |= TEGRA_GMI_RDY_ACTIVE_HIGH;
122 gmi->snor_config |= TEGRA_GMI_ADV_ACTIVE_HIGH;
125 gmi->snor_config |= TEGRA_GMI_OE_ACTIVE_HIGH;
128 gmi->snor_config |= TEGRA_GMI_CS_ACTIVE_HIGH;
135 dev_err(gmi->dev,
147 dev_err(gmi->dev,
157 dev_err(gmi->dev, "invalid chip select: %d", property);
162 gmi->snor_config |= TEGRA_GMI_CS_SELECT(property);
166 gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(property);
168 gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(1);
171 gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(property);
173 gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(1);
176 gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(property);
178 gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(1);
181 gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(property);
183 gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(4);
186 gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(property);
188 gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(1);
191 gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(property);
193 gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(1);
196 gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(property);
198 gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(3);
208 struct tegra_gmi *gmi;
212 gmi = devm_kzalloc(dev, sizeof(*gmi), GFP_KERNEL);
213 if (!gmi)
216 gmi->dev = dev;
219 gmi->base = devm_ioremap_resource(dev, res);
220 if (IS_ERR(gmi->base))
221 return PTR_ERR(gmi->base);
223 gmi->clk = devm_clk_get(dev, "gmi");
224 if (IS_ERR(gmi->clk)) {
226 return PTR_ERR(gmi->clk);
229 gmi->rst = devm_reset_control_get(dev, "gmi");
230 if (IS_ERR(gmi->rst)) {
232 return PTR_ERR(gmi->rst);
235 err = tegra_gmi_parse_dt(gmi);
239 err = tegra_gmi_enable(gmi);
246 tegra_gmi_disable(gmi);
250 platform_set_drvdata(pdev, gmi);
257 struct tegra_gmi *gmi = platform_get_drvdata(pdev);
259 of_platform_depopulate(gmi->dev);
260 tegra_gmi_disable(gmi);
266 { .compatible = "nvidia,tegra20-gmi", },
267 { .compatible = "nvidia,tegra30-gmi", },
276 .name = "tegra-gmi",