Lines Matching refs:mhi_cntrl
441 #define MHI_DB_ACCESS_VALID(mhi_cntrl) (mhi_cntrl->pm_state & \
442 mhi_cntrl->db_access)
470 void (*process_db)(struct mhi_controller *mhi_cntrl,
518 struct mhi_controller *mhi_cntrl;
530 int (*process_event)(struct mhi_controller *mhi_cntrl,
575 void mhi_create_debugfs(struct mhi_controller *mhi_cntrl);
576 void mhi_destroy_debugfs(struct mhi_controller *mhi_cntrl);
580 static inline void mhi_create_debugfs(struct mhi_controller *mhi_cntrl)
584 static inline void mhi_destroy_debugfs(struct mhi_controller *mhi_cntrl)
597 struct mhi_device *mhi_alloc_device(struct mhi_controller *mhi_cntrl);
600 void mhi_create_devices(struct mhi_controller *mhi_cntrl);
602 int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl,
604 void mhi_free_bhie_table(struct mhi_controller *mhi_cntrl,
609 struct mhi_controller *mhi_cntrl,
612 enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl);
613 int mhi_queue_state_transition(struct mhi_controller *mhi_cntrl,
616 void mhi_pm_sys_err_handler(struct mhi_controller *mhi_cntrl);
618 int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl);
619 int mhi_pm_m0_transition(struct mhi_controller *mhi_cntrl);
620 void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl);
621 int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl);
622 int __mhi_device_get_sync(struct mhi_controller *mhi_cntrl);
623 int mhi_send_cmd(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
625 static inline bool mhi_is_active(struct mhi_controller *mhi_cntrl)
627 return (mhi_cntrl->dev_state >= MHI_STATE_M0 &&
628 mhi_cntrl->dev_state <= MHI_STATE_M3_FAST);
631 static inline void mhi_trigger_resume(struct mhi_controller *mhi_cntrl)
633 pm_wakeup_event(&mhi_cntrl->mhi_dev->dev, 0);
634 mhi_cntrl->runtime_get(mhi_cntrl);
635 mhi_cntrl->runtime_put(mhi_cntrl);
639 void mhi_db_brstmode(struct mhi_controller *mhi_cntrl, struct db_cfg *db_cfg,
641 void mhi_db_brstmode_disable(struct mhi_controller *mhi_cntrl,
644 int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl,
646 int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
649 void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
651 void mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base,
654 void mhi_write_db(struct mhi_controller *mhi_cntrl, void __iomem *db_addr,
656 void mhi_ring_cmd_db(struct mhi_controller *mhi_cntrl, struct mhi_cmd *mhi_cmd);
657 void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,
661 int mhi_init_mmio(struct mhi_controller *mhi_cntrl);
662 int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl);
663 void mhi_deinit_dev_ctxt(struct mhi_controller *mhi_cntrl);
664 int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl);
665 void mhi_deinit_free_irq(struct mhi_controller *mhi_cntrl);
666 void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
668 void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl);
669 int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
671 int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl,
673 void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl,
675 void mhi_reset_chan(struct mhi_controller *mhi_cntrl,
679 static inline void *mhi_alloc_coherent(struct mhi_controller *mhi_cntrl,
684 void *buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, size, dma_handle,
690 static inline void mhi_free_coherent(struct mhi_controller *mhi_cntrl,
695 dma_free_coherent(mhi_cntrl->cntrl_dev, size, vaddr, dma_handle);
701 int mhi_process_data_event_ring(struct mhi_controller *mhi_cntrl,
703 int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl,
711 int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
713 int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl,
715 int mhi_map_single_use_bb(struct mhi_controller *mhi_cntrl,
717 void mhi_unmap_single_no_bb(struct mhi_controller *mhi_cntrl,
719 void mhi_unmap_single_use_bb(struct mhi_controller *mhi_cntrl,