Lines Matching defs:wr_regl
356 static inline void wr_regl (const hrz_dev * dev, unsigned char reg, u32 data) {
384 // wr_regl (dev, MEM_WR_ADDR_REG_OFF, (u32) addr);
385 wr_regl (dev, MEM_WR_ADDR_REG_OFF, (addr - (HDW *) 0) * sizeof(HDW));
386 wr_regl (dev, MEMORY_PORT_OFF, data);
390 // wr_regl (dev, MEM_RD_ADDR_REG_OFF, (u32) addr);
391 wr_regl (dev, MEM_RD_ADDR_REG_OFF, (addr - (HDW *) 0) * sizeof(HDW));
396 wr_regl (dev, MEM_WR_ADDR_REG_OFF, (u32) addr | 0x80000000);
397 wr_regl (dev, MEMORY_PORT_OFF, data);
401 wr_regl (dev, MEM_RD_ADDR_REG_OFF, (u32) addr | 0x80000000);
434 wr_regl (dev, TX_CHANNEL_PORT_OFF, tx_channel);
936 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, 0);
1019 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, 0);
1022 wr_regl (dev, MASTER_RX_ADDR_REG_OFF, virt_to_bus (dev->rx_addr));
1023 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, rx_bytes);
1028 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, 0);
1056 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, 0);
1102 wr_regl (dev, MASTER_TX_COUNT_REG_OFF, 0);
1170 wr_regl (dev, MASTER_TX_COUNT_REG_OFF, 0);
1173 wr_regl (dev, TX_DESCRIPTOR_PORT_OFF, cpu_to_be32 (dev->tx_skb->len));
1175 wr_regl (dev, MASTER_TX_ADDR_REG_OFF, virt_to_bus (dev->tx_addr));
1177 wr_regl (dev, TX_DESCRIPTOR_REG_OFF, cpu_to_be32 (dev->tx_skb->len));
1178 wr_regl (dev, MASTER_TX_COUNT_REG_OFF,
1186 wr_regl (dev, MASTER_TX_COUNT_REG_OFF, 0);
1212 wr_regl (dev, MASTER_TX_COUNT_REG_OFF, 0);
1726 wr_regl (dev, CONTROL_0_REG, control_0_reg);
1731 wr_regl (dev, CONTROL_0_REG, control_0_reg |
1736 wr_regl (dev, CONTROL_0_REG, control_0_reg);
1743 wr_regl (dev, CONTROL_0_REG, ctrl);
1941 wr_regl (dev, CONTROL_0_REG, ctrl);
1949 wr_regl (dev, CONTROL_0_REG, ctrl);
2021 wr_regl (dev, INT_ENABLE_REG_OFF, INTERESTING_INTERRUPTS);