Lines Matching refs:iowrite32
162 iowrite32(0, base + SATAPHYADDR_REG);
164 iowrite32(SATAPHYRESET_PHYRST, base + SATAPHYRESET_REG);
167 iowrite32(0, base + SATAPHYRESET_REG);
177 iowrite32(0, base + SATAPHYRESET_REG);
179 iowrite32(SATAPHYACCEN_PHYLANE, base + SATAPHYACCEN_REG);
181 iowrite32(val, base + SATAPHYWDATA_REG);
186 iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, base + SATAPHYADDR_REG);
196 iowrite32(0, base + SATAPHYADDR_REG);
214 iowrite32(RCAR_GEN2_PHY_CTL1, base + RCAR_GEN2_PHY_CTL1_REG);
215 iowrite32(RCAR_GEN2_PHY_CTL2, base + RCAR_GEN2_PHY_CTL2_REG);
216 iowrite32(RCAR_GEN2_PHY_CTL3, base + RCAR_GEN2_PHY_CTL3_REG);
217 iowrite32(RCAR_GEN2_PHY_CTL4, base + RCAR_GEN2_PHY_CTL4_REG);
218 iowrite32(RCAR_GEN2_PHY_CTL5 | RCAR_GEN2_PHY_CTL5_DC |
227 iowrite32(priv->sataint_mask, priv->base + SATAINTMASK_REG);
238 iowrite32(~(u32)SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
243 iowrite32(priv->sataint_mask & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
262 iowrite32(*ptr++, reg);
277 iowrite32(ctl, ap->ioaddr.ctl_addr);
282 iowrite32(ATA_DEVICE_OBS, ap->ioaddr.device_addr);
294 iowrite32(0x55, ioaddr->nsect_addr);
295 iowrite32(0xaa, ioaddr->lbal_addr);
297 iowrite32(0xaa, ioaddr->nsect_addr);
298 iowrite32(0x55, ioaddr->lbal_addr);
300 iowrite32(0x55, ioaddr->nsect_addr);
301 iowrite32(0xaa, ioaddr->lbal_addr);
329 iowrite32(ap->ctl, ioaddr->ctl_addr);
331 iowrite32(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
333 iowrite32(ap->ctl, ioaddr->ctl_addr);
375 iowrite32(tf->ctl, ioaddr->ctl_addr);
381 iowrite32(tf->hob_feature, ioaddr->feature_addr);
382 iowrite32(tf->hob_nsect, ioaddr->nsect_addr);
383 iowrite32(tf->hob_lbal, ioaddr->lbal_addr);
384 iowrite32(tf->hob_lbam, ioaddr->lbam_addr);
385 iowrite32(tf->hob_lbah, ioaddr->lbah_addr);
395 iowrite32(tf->feature, ioaddr->feature_addr);
396 iowrite32(tf->nsect, ioaddr->nsect_addr);
397 iowrite32(tf->lbal, ioaddr->lbal_addr);
398 iowrite32(tf->lbam, ioaddr->lbam_addr);
399 iowrite32(tf->lbah, ioaddr->lbah_addr);
409 iowrite32(tf->device, ioaddr->device_addr);
429 iowrite32(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
435 iowrite32(tf->ctl, ioaddr->ctl_addr);
445 iowrite32(tf->command, ap->ioaddr.command_addr);
523 iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg << 2));
573 iowrite32(ap->bmdma_prd_dma, base + ATAPI_DTB_ADR_REG);
584 iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
601 iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
616 iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
739 iowrite32(~sataintstat & priv->sataint_mask, base + SATAINTSTAT_REG);
796 iowrite32(val, base + ATAPI_CONTROL1_REG);
803 iowrite32(val, base + ATAPI_CONTROL1_REG);
808 iowrite32(val, base + ATAPI_CONTROL1_REG);
811 iowrite32(0, base + SATAINTSTAT_REG);
812 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
815 iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
953 iowrite32(0, base + ATAPI_INT_ENABLE_REG);
955 iowrite32(0, base + SATAINTSTAT_REG);
956 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
975 iowrite32(0, base + ATAPI_INT_ENABLE_REG);
977 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
1002 iowrite32(0, base + SATAINTSTAT_REG);
1003 iowrite32(priv->sataint_mask, base + SATAINTMASK_REG);
1006 iowrite32(ATAPI_INT_ENABLE_SATAINT,