Lines Matching refs:state
63 struct pata_icside_state *state;
88 struct pata_icside_state *state = ec->irq_data;
90 writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
98 struct pata_icside_state *state = ec->irq_data;
100 readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
115 struct pata_icside_state *state = ec->irq_data;
116 void __iomem *base = state->irq_port;
118 if (!state->port[0].disabled)
120 if (!state->port[1].disabled)
129 struct pata_icside_state *state = ec->irq_data;
131 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
132 readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
140 struct pata_icside_state *state = ec->irq_data;
142 return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
143 readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
190 struct pata_icside_state *state = ap->host->private_data;
217 state->port[ap->port_no].speed[adev->devno] = cycle;
223 struct pata_icside_state *state = ap->host->private_data;
230 BUG_ON(dma_channel_active(state->dma));
235 writeb(state->port[ap->port_no].port_sel, state->ioc_base);
237 set_dma_speed(state->dma, state->port[ap->port_no].speed[qc->dev->devno]);
238 set_dma_sg(state->dma, qc->sg, qc->n_elem);
239 set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ);
248 struct pata_icside_state *state = ap->host->private_data;
250 BUG_ON(dma_channel_active(state->dma));
251 enable_dma(state->dma);
257 struct pata_icside_state *state = ap->host->private_data;
259 disable_dma(state->dma);
267 struct pata_icside_state *state = ap->host->private_data;
270 irq_port = state->irq_port + (ap->port_no ? ICS_ARCIN_V6_INTRSTAT_2 :
278 struct pata_icside_state *state = info->state;
283 state->port[0].speed[i] = 480;
284 state->port[1].speed[i] = 480;
288 state->dma = ec->dma;
305 struct pata_icside_state *state = ap->host->private_data;
310 state->port[ap->port_no].disabled = 1;
312 if (state->type == ICS_TYPE_V6) {
318 void __iomem *irq_port = state->irq_port +
373 struct pata_icside_state *state = info->state;
380 state->irq_port = base;
396 struct pata_icside_state *state = info->state;
420 state->irq_port = easi_base;
421 state->ioc_base = ioc_base;
422 state->port[0].port_sel = sel;
423 state->port[1].port_sel = sel | 1;
448 ecard_setirq(ec, info->irqops, info->state);
459 host->private_data = info->state;
480 struct pata_icside_state *state;
489 state = devm_kzalloc(&ec->dev, sizeof(*state), GFP_KERNEL);
490 if (!state) {
495 state->type = ICS_TYPE_NOTYPE;
496 state->dma = NO_DMA;
508 state->type = type;
512 info.state = state;
515 switch (state->type) {
572 struct pata_icside_state *state = host->private_data;
573 if (state->ioc_base)
574 writeb(0, state->ioc_base);
581 struct pata_icside_state *state = host->private_data;
591 if (state->dma != NO_DMA)
592 free_dma(state->dma);