Lines Matching refs:ftide

143 	struct ftide010 *ftide = ap->host->private_data;
161 clkreg = readb(ftide->base + FTIDE010_CLK_MOD);
167 dev_dbg(ftide->dev, "set UDMA mode %02x, index %d\n",
184 dev_dbg(ftide->dev, "UDMA write clkreg = %02x, timreg = %02x\n",
187 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD);
188 writeb(timreg, ftide->base + FTIDE010_UDMA_TIMING0 + devno);
191 dev_dbg(ftide->dev, "set MWDMA mode %02x, index %d\n",
202 dev_dbg(ftide->dev,
206 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD);
207 writeb(timreg, ftide->base + FTIDE010_MWDMA_TIMING);
222 struct ftide010 *ftide = ap->host->private_data;
225 dev_dbg(ftide->dev, "set PIO mode %02x, index %d\n",
228 ftide->base + FTIDE010_PIO_TIMING);
272 struct ftide010 *ftide = ap->host->private_data;
273 struct device *dev = ftide->dev;
274 struct sata_gemini *sg = ftide->sg;
282 if (ftide->master_to_sata0) {
288 if (ftide->master_to_sata1) {
295 if (ftide->slave_to_sata0 && !ftide->master_to_sata0) {
302 if (ftide->slave_to_sata1 && !ftide->master_to_sata1) {
315 struct ftide010 *ftide = ap->host->private_data;
316 struct device *dev = ftide->dev;
317 struct sata_gemini *sg = ftide->sg;
319 if (ftide->master_to_sata0) {
323 if (ftide->master_to_sata1) {
328 if (ftide->slave_to_sata0 && !ftide->master_to_sata0) {
333 if (ftide->slave_to_sata1 && !ftide->master_to_sata1) {
341 struct ftide010 *ftide = ap->host->private_data;
347 return ftide->master_cbl;
350 static int pata_ftide010_gemini_init(struct ftide010 *ftide,
354 struct device *dev = ftide->dev;
362 ftide->sg = sg;
394 ftide->master_cbl = ATA_CBL_SATA;
395 ftide->slave_cbl = ATA_CBL_PATA40;
396 ftide->master_to_sata0 = true;
399 ftide->master_cbl = ATA_CBL_SATA;
400 ftide->slave_cbl = ATA_CBL_NONE;
401 ftide->master_to_sata0 = true;
404 ftide->master_cbl = ATA_CBL_PATA40;
405 ftide->slave_cbl = ATA_CBL_PATA40;
408 ftide->master_cbl = ATA_CBL_SATA;
409 ftide->slave_cbl = ATA_CBL_SATA;
410 ftide->master_to_sata0 = true;
411 ftide->slave_to_sata1 = true;
417 ftide->master_cbl = ATA_CBL_SATA;
418 ftide->slave_cbl = ATA_CBL_NONE;
419 ftide->master_to_sata1 = true;
422 ftide->master_cbl = ATA_CBL_SATA;
423 ftide->slave_cbl = ATA_CBL_PATA40;
424 ftide->master_to_sata1 = true;
427 ftide->master_cbl = ATA_CBL_SATA;
428 ftide->slave_cbl = ATA_CBL_SATA;
429 ftide->slave_to_sata0 = true;
430 ftide->master_to_sata1 = true;
433 ftide->master_cbl = ATA_CBL_PATA40;
434 ftide->slave_cbl = ATA_CBL_PATA40;
443 static int pata_ftide010_gemini_init(struct ftide010 *ftide,
458 struct ftide010 *ftide;
464 ftide = devm_kzalloc(dev, sizeof(*ftide), GFP_KERNEL);
465 if (!ftide)
467 ftide->dev = dev;
477 ftide->base = devm_ioremap_resource(dev, res);
478 if (IS_ERR(ftide->base))
479 return PTR_ERR(ftide->base);
481 ftide->pclk = devm_clk_get(dev, "PCLK");
482 if (!IS_ERR(ftide->pclk)) {
483 ret = clk_prepare_enable(ftide->pclk);
499 ret = pata_ftide010_gemini_init(ftide,
506 ftide->master_cbl = ATA_CBL_PATA40;
507 ftide->slave_cbl = ATA_CBL_PATA40;
510 ftide->host = ata_host_alloc_pinfo(dev, ppi, 1);
511 if (!ftide->host) {
515 ftide->host->private_data = ftide;
517 for (i = 0; i < ftide->host->n_ports; i++) {
518 struct ata_port *ap = ftide->host->ports[i];
521 ioaddr->bmdma_addr = ftide->base + FTIDE010_DMA_REG;
522 ioaddr->cmd_addr = ftide->base + FTIDE010_CMD_DATA;
523 ioaddr->ctl_addr = ftide->base + FTIDE010_ALTSTAT_CTRL;
524 ioaddr->altstatus_addr = ftide->base + FTIDE010_ALTSTAT_CTRL;
529 readl(ftide->base + FTIDE010_IDE_DEVICE_ID), irq, res);
531 ret = ata_host_activate(ftide->host, irq, ata_bmdma_interrupt,
539 if (!IS_ERR(ftide->pclk))
540 clk_disable_unprepare(ftide->pclk);
547 struct ftide010 *ftide = host->private_data;
549 ata_host_detach(ftide->host);
550 if (!IS_ERR(ftide->pclk))
551 clk_disable_unprepare(ftide->pclk);