Lines Matching defs:timing
56 /* Now load the right timing register */
64 * cs5530_set_dmamode - DMA timing setup
76 u32 tuning, timing = 0;
84 timing = 0x00921250;break;
86 timing = 0x00911140;break;
88 timing = 0x00911030;break;
90 timing = 0x00077771;break;
92 timing = 0x00012121;break;
94 timing = 0x00002020;break;
99 timing |= (tuning & 0x80000000UL);
101 iowrite32(timing, base + 0x04);
103 if (timing & 0x00100000)
108 iowrite32(timing, base + 0x0C);