Lines Matching defs:base
67 static void pata_bk3710_setudmamode(void __iomem *base, unsigned int dev,
82 val32 = ioread32(base + BK3710_UDMASTB) & (0xFF << (dev ? 0 : 8));
84 iowrite32(val32, base + BK3710_UDMASTB);
87 val32 = ioread32(base + BK3710_UDMATRP) & (0xFF << (dev ? 0 : 8));
89 iowrite32(val32, base + BK3710_UDMATRP);
92 val32 = ioread32(base + BK3710_UDMAENV) & (0xFF << (dev ? 0 : 8));
94 iowrite32(val32, base + BK3710_UDMAENV);
97 val16 = ioread16(base + BK3710_UDMACTL) | (1 << dev);
98 iowrite16(val16, base + BK3710_UDMACTL);
101 static void pata_bk3710_setmwdmamode(void __iomem *base, unsigned int dev,
120 val32 = ioread32(base + BK3710_DMASTB) & (0xFF << (dev ? 0 : 8));
122 iowrite32(val32, base + BK3710_DMASTB);
124 val32 = ioread32(base + BK3710_DMARCVR) & (0xFF << (dev ? 0 : 8));
126 iowrite32(val32, base + BK3710_DMARCVR);
129 val16 = ioread16(base + BK3710_UDMACTL) & ~(1 << dev);
130 iowrite16(val16, base + BK3710_UDMACTL);
136 void __iomem *base = (void __iomem *)ap->ioaddr.bmdma_addr;
141 pata_bk3710_setudmamode(base, is_slave,
144 pata_bk3710_setmwdmamode(base, is_slave,
149 static void pata_bk3710_setpiomode(void __iomem *base, struct ata_device *pair,
166 val32 = ioread32(base + BK3710_DATSTB) & (0xFF << (dev ? 0 : 8));
168 iowrite32(val32, base + BK3710_DATSTB);
170 val32 = ioread32(base + BK3710_DATRCVR) & (0xFF << (dev ? 0 : 8));
172 iowrite32(val32, base + BK3710_DATRCVR);
189 val32 = ioread32(base + BK3710_REGSTB) & (0xFF << (dev ? 0 : 8));
191 iowrite32(val32, base + BK3710_REGSTB);
193 val32 = ioread32(base + BK3710_REGRCVR) & (0xFF << (dev ? 0 : 8));
195 iowrite32(val32, base + BK3710_REGRCVR);
201 void __iomem *base = (void __iomem *)ap->ioaddr.bmdma_addr;
223 pata_bk3710_setpiomode(base, pair, is_slave, cycle_time, pio);
226 static void pata_bk3710_chipinit(void __iomem *base)
245 iowrite16(BIT(15), base + BK3710_IDETIMP);
253 iowrite16(0, base + BK3710_UDMACTL);
261 iowrite32(0x001, base + BK3710_MISCCTL);
267 iowrite32(0, base + BK3710_IORDYTMP);
277 iowrite16(0xE, base + BK3710_BMISP);
279 pata_bk3710_setpiomode(base, NULL, 0, 600, 0);
280 pata_bk3710_setpiomode(base, NULL, 1, 600, 0);
297 void __iomem *base;
321 base = devm_ioremap_resource(&pdev->dev, mem);
322 if (IS_ERR(base))
323 return PTR_ERR(base);
326 pata_bk3710_chipinit(base);
340 ap->ioaddr.data_addr = base + BK3710_TF_OFFSET;
341 ap->ioaddr.error_addr = base + BK3710_TF_OFFSET + 1;
342 ap->ioaddr.feature_addr = base + BK3710_TF_OFFSET + 1;
343 ap->ioaddr.nsect_addr = base + BK3710_TF_OFFSET + 2;
344 ap->ioaddr.lbal_addr = base + BK3710_TF_OFFSET + 3;
345 ap->ioaddr.lbam_addr = base + BK3710_TF_OFFSET + 4;
346 ap->ioaddr.lbah_addr = base + BK3710_TF_OFFSET + 5;
347 ap->ioaddr.device_addr = base + BK3710_TF_OFFSET + 6;
348 ap->ioaddr.status_addr = base + BK3710_TF_OFFSET + 7;
349 ap->ioaddr.command_addr = base + BK3710_TF_OFFSET + 7;
351 ap->ioaddr.altstatus_addr = base + BK3710_CTL_OFFSET;
352 ap->ioaddr.ctl_addr = base + BK3710_CTL_OFFSET;
354 ap->ioaddr.bmdma_addr = base;
357 (unsigned long)base + BK3710_TF_OFFSET,
358 (unsigned long)base + BK3710_CTL_OFFSET);