Lines Matching refs:tegra
20 #include <soc/tegra/fuse.h>
21 #include <soc/tegra/pmc.h>
25 #define DRV_NAME "tegra-ahci"
179 struct tegra_ahci_priv *tegra = hpriv->plat_data;
182 if (tegra->sata_aux_regs && !tegra->soc->supports_devslp) {
183 val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0);
185 writel(val, tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0);
191 struct tegra_ahci_priv *tegra = hpriv->plat_data;
203 writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
205 val = readl(tegra->sata_regs +
211 writel(val, tegra->sata_regs + SCFG_OFFSET +
214 val = readl(tegra->sata_regs +
220 writel(val, tegra->sata_regs + SCFG_OFFSET +
224 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL11);
226 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL2);
228 writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
235 struct tegra_ahci_priv *tegra = hpriv->plat_data;
238 ret = regulator_bulk_enable(tegra->soc->num_supplies,
239 tegra->supplies);
244 tegra->sata_clk,
245 tegra->sata_rst);
249 reset_control_assert(tegra->sata_oob_rst);
250 reset_control_assert(tegra->sata_cold_rst);
256 reset_control_deassert(tegra->sata_cold_rst);
257 reset_control_deassert(tegra->sata_oob_rst);
262 clk_disable_unprepare(tegra->sata_clk);
267 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
274 struct tegra_ahci_priv *tegra = hpriv->plat_data;
278 reset_control_assert(tegra->sata_rst);
279 reset_control_assert(tegra->sata_oob_rst);
280 reset_control_assert(tegra->sata_cold_rst);
282 clk_disable_unprepare(tegra->sata_clk);
285 regulator_bulk_disable(tegra->soc->num_supplies, tegra->supplies);
290 struct tegra_ahci_priv *tegra = hpriv->plat_data;
296 dev_err(&tegra->pdev->dev,
305 val = readl(tegra->sata_regs + SATA_FPCI_BAR5);
308 writel(val, tegra->sata_regs + SATA_FPCI_BAR5);
311 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
313 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
317 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0);
319 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0);
321 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0);
323 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0);
327 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
330 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
332 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
339 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
344 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
347 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
349 if (tegra->soc->ops && tegra->soc->ops->init)
350 tegra->soc->ops->init(hpriv);
356 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
359 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
361 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9);
364 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
366 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
368 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
373 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
375 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
377 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
380 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
385 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
391 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
394 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
397 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1);
399 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
402 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
405 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
407 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
413 val = readl(tegra->sata_regs + SATA_INTR_MASK);
415 writel(val, tegra->sata_regs + SATA_INTR_MASK);
483 struct tegra_ahci_priv *tegra;
491 tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
492 if (!tegra)
495 hpriv->plat_data = tegra;
497 tegra->pdev = pdev;
498 tegra->soc = of_device_get_match_data(&pdev->dev);
501 tegra->sata_regs = devm_ioremap_resource(&pdev->dev, res);
502 if (IS_ERR(tegra->sata_regs))
503 return PTR_ERR(tegra->sata_regs);
510 tegra->sata_aux_regs = devm_ioremap_resource(&pdev->dev, res);
511 if (IS_ERR(tegra->sata_aux_regs))
512 return PTR_ERR(tegra->sata_aux_regs);
515 tegra->sata_rst = devm_reset_control_get(&pdev->dev, "sata");
516 if (IS_ERR(tegra->sata_rst)) {
518 return PTR_ERR(tegra->sata_rst);
521 tegra->sata_oob_rst = devm_reset_control_get(&pdev->dev, "sata-oob");
522 if (IS_ERR(tegra->sata_oob_rst)) {
524 return PTR_ERR(tegra->sata_oob_rst);
527 tegra->sata_cold_rst = devm_reset_control_get(&pdev->dev, "sata-cold");
528 if (IS_ERR(tegra->sata_cold_rst)) {
530 return PTR_ERR(tegra->sata_cold_rst);
533 tegra->sata_clk = devm_clk_get(&pdev->dev, "sata");
534 if (IS_ERR(tegra->sata_clk)) {
536 return PTR_ERR(tegra->sata_clk);
539 tegra->supplies = devm_kcalloc(&pdev->dev,
540 tegra->soc->num_supplies,
541 sizeof(*tegra->supplies), GFP_KERNEL);
542 if (!tegra->supplies)
545 regulator_bulk_set_supply_names(tegra->supplies,
546 tegra->soc->supply_names,
547 tegra->soc->num_supplies);
550 tegra->soc->num_supplies,
551 tegra->supplies);