Lines Matching defs:sata_regs
166 void __iomem *sata_regs;
203 writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
205 val = readl(tegra->sata_regs +
211 writel(val, tegra->sata_regs + SCFG_OFFSET +
214 val = readl(tegra->sata_regs +
220 writel(val, tegra->sata_regs + SCFG_OFFSET +
224 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL11);
226 tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL2);
228 writel(0, tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX);
305 val = readl(tegra->sata_regs + SATA_FPCI_BAR5);
308 writel(val, tegra->sata_regs + SATA_FPCI_BAR5);
311 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
313 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
317 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL17_0);
319 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL18_0);
321 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL20_0);
323 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CHX_PHY_CTRL21_0);
327 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
330 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA_CFG_PHY_0);
332 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
339 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_NVOOB);
344 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
347 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG2NVOOB_2);
356 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
359 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_1);
361 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_9);
364 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
366 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
368 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
373 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_BKDOOR_CC);
375 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
377 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_SATA);
380 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
385 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_HBA_CAP_BKDR);
391 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
394 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_35);
397 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_AHCI_IDP1);
399 val = readl(tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
402 writel(val, tegra->sata_regs + SCFG_OFFSET + T_SATA0_CFG_PHY_1);
405 val = readl(tegra->sata_regs + SATA_CONFIGURATION_0);
407 writel(val, tegra->sata_regs + SATA_CONFIGURATION_0);
413 val = readl(tegra->sata_regs + SATA_INTR_MASK);
415 writel(val, tegra->sata_regs + SATA_INTR_MASK);
501 tegra->sata_regs = devm_ioremap_resource(&pdev->dev, res);
502 if (IS_ERR(tegra->sata_regs))
503 return PTR_ERR(tegra->sata_regs);