Lines Matching refs:smmu
407 struct acpi_iort_smmu_v3 *smmu;
419 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
424 if (smmu->event_gsiv && smmu->pri_gsiv && smmu->gerr_gsiv
425 && smmu->sync_gsiv)
428 if (smmu->id_mapping_index >= node->mapping_count) {
434 return smmu->id_mapping_index;
799 struct acpi_iort_smmu_v3 *smmu;
801 smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;
802 if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)
1181 struct acpi_iort_smmu_v3 *smmu;
1186 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1188 if (smmu->event_gsiv)
1191 if (smmu->pri_gsiv)
1194 if (smmu->gerr_gsiv)
1197 if (smmu->sync_gsiv)
1203 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)
1209 if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1216 return smmu->event_gsiv == smmu->pri_gsiv &&
1217 smmu->event_gsiv == smmu->gerr_gsiv &&
1218 smmu->event_gsiv == smmu->sync_gsiv;
1221 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)
1227 if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)
1236 struct acpi_iort_smmu_v3 *smmu;
1240 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1242 res[num_res].start = smmu->base_address;
1243 res[num_res].end = smmu->base_address +
1244 arm_smmu_v3_resource_size(smmu) - 1;
1248 if (arm_smmu_v3_is_combined_irq(smmu)) {
1249 if (smmu->event_gsiv)
1250 acpi_iort_register_irq(smmu->event_gsiv, "combined",
1255 if (smmu->event_gsiv)
1256 acpi_iort_register_irq(smmu->event_gsiv, "eventq",
1260 if (smmu->pri_gsiv)
1261 acpi_iort_register_irq(smmu->pri_gsiv, "priq",
1265 if (smmu->gerr_gsiv)
1266 acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",
1270 if (smmu->sync_gsiv)
1271 acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",
1280 struct acpi_iort_smmu_v3 *smmu;
1284 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1286 attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?
1303 struct acpi_iort_smmu_v3 *smmu;
1305 smmu = (struct acpi_iort_smmu_v3 *)node->node_data;
1306 if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {
1307 int dev_node = pxm_to_node(smmu->pxm);
1314 smmu->base_address,
1315 smmu->pxm);
1325 struct acpi_iort_smmu *smmu;
1328 smmu = (struct acpi_iort_smmu *)node->node_data;
1338 return smmu->context_interrupt_count + 2;
1344 struct acpi_iort_smmu *smmu;
1349 smmu = (struct acpi_iort_smmu *)node->node_data;
1351 res[num_res].start = smmu->base_address;
1352 res[num_res].end = smmu->base_address + smmu->span - 1;
1356 glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);
1361 acpi_iort_register_irq(hw_irq, "arm-smmu-global", trigger,
1365 ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);
1366 for (i = 0; i < smmu->context_interrupt_count; i++) {
1370 acpi_iort_register_irq(hw_irq, "arm-smmu-context", trigger,
1378 struct acpi_iort_smmu *smmu;
1382 smmu = (struct acpi_iort_smmu *)node->node_data;
1384 attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?
1474 .name = "arm-smmu-v3",
1482 .name = "arm-smmu",
1489 .name = "arm-smmu-v3-pmcg",