Lines Matching refs:x89
217 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
246 EMIT3(0x89, add_2reg(0x40, IA32_EBP, sreg), STACK_VAR(dst));
249 EMIT2(0x89, add_2reg(0xC0, dst, sreg));
308 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
312 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));
356 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
359 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
412 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, dreg_hi));
414 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));
416 EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));
422 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
425 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
464 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
467 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EDX));
470 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
473 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));
515 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst));
571 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg),
671 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg),
721 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
724 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
767 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));
773 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
776 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
820 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
826 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
829 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
873 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
879 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
882 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
916 EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));
928 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
931 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
965 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
977 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
980 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
1013 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
1021 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));
1026 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),
1029 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),
1057 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));
1097 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
1100 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),
1104 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));
1106 EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));
1130 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));
1157 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
1160 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),
1164 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));
1166 EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));
1212 EMIT2(0x89, 0xE5);
1228 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBP), STACK_VAR(fplo));
1229 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi));
1233 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0]));
1234 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1]));
1237 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0]));
1238 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
1349 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));
1351 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));
1795 EMIT2(0x66, 0x89); break;
1798 EMIT(0x89, 1); break;
1818 EMIT1(0x89);
1863 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
1867 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EDX));
1889 EMIT3(0x89,
1894 EMIT2(0x89,
1937 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),
1940 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),
2055 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
2058 EMIT2(0x89,
2100 EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
2103 EMIT2(0x89,