Lines Matching refs:x48
68 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
289 EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */
292 EMIT3_off32(0x48, 0x81, 0xEC, round_up(stack_depth, 8));
470 EMIT4_off32(0x48, 0x8B, 0x8C, 0xD6, /* mov rcx, [rsi + rdx * 8 + offsetof(...)] */
477 EMIT3(0x48, 0x85, 0xC9); /* test rcx,rcx */
486 EMIT3_off32(0x48, 0x81, 0xC4, /* add rsp, sd */
490 EMIT4(0x48, 0x8B, 0x49, /* mov rcx, qword ptr [rcx + 32] */
492 EMIT4(0x48, 0x83, 0xC1, /* add rcx, X86_TAIL_CALL_OFFSET */
538 EMIT3_off32(0x48, 0x81, 0xC4, round_up(stack_depth, 8));
608 b1 = add_1mod(0x48, dst_reg);
652 EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
687 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
691 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
702 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
745 EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
842 EMIT1(add_2mod(0x48, dst_reg, src_reg));
859 EMIT1(add_1mod(0x48, dst_reg));
876 EMIT1(add_1mod(0x48, dst_reg));
997 EMIT1(add_1mod(0x48, AUX_REG));
1020 EMIT1(add_1mod(0x48, dst_reg));
1059 EMIT1(add_1mod(0x48, dst_reg));
1104 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
1161 EMIT2(add_1mod(0x48, dst_reg), 0xC7);
1242 EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
1255 EMIT3_off32(0x48, 0x8B, 0x85,
1303 EMIT1(add_2mod(0x48, dst_reg, src_reg));
1313 EMIT1(add_2mod(0x48, dst_reg, src_reg));
1323 EMIT1(add_1mod(0x48, dst_reg));
1352 EMIT1(add_2mod(0x48, dst_reg, dst_reg));
1361 EMIT1(add_1mod(0x48, dst_reg));
1533 * EMIT4(0x48, 0x8B, 0x7D, 0xF0); mov rdi,QWORD PTR [rbp-0x10]
1534 * EMIT4(0x48, 0x8B, 0x75, 0xF8); mov rsi,QWORD PTR [rbp-0x8]
1560 EMIT4(0x48, 0x8D, 0x7D, -stack_size);
1682 EMIT4(0x48, 0x83, 0x7d, 0xf8); EMIT1(0x00);
1809 EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */
1810 EMIT4(0x48, 0x83, 0xEC, stack_size); /* sub rsp, stack_size */
1902 EMIT4(0x48, 0x83, 0xC4, 8); /* add rsp, 8 */
1926 EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */
1947 EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */