Lines Matching defs:EMIT1
35 #define EMIT1(b1) EMIT(b1, 1)
41 do { EMIT1(b1); EMIT(off, 4); } while (0)
240 EMIT1(0x53); /* push rbx */
262 EMIT1(0x5B); /* pop rbx */
288 EMIT1(0x55); /* push rbp */
294 EMIT1(0x50); /* push rax */
410 EMIT1(0xC3); /* ret */
412 EMIT1(0xCC); /* int3 */
484 EMIT1(0x58); /* pop rax */
536 EMIT1(0x58); /* pop rax */
621 EMIT1(add_2mod(0x40, dst_reg, dst_reg));
630 EMIT1(add_1mod(0x40, dst_reg));
671 EMIT1(add_2mod(0x40, dst_reg, src_reg));
698 EMIT1(0x8B);
730 EMIT1(0x88);
742 EMIT1(0x89);
842 EMIT1(add_2mod(0x48, dst_reg, src_reg));
844 EMIT1(add_2mod(0x40, dst_reg, src_reg));
859 EMIT1(add_1mod(0x48, dst_reg));
861 EMIT1(add_1mod(0x40, dst_reg));
876 EMIT1(add_1mod(0x48, dst_reg));
878 EMIT1(add_1mod(0x40, dst_reg));
936 EMIT1(0x50); /* push rax */
937 EMIT1(0x52); /* push rdx */
969 EMIT1(0x5A); /* pop rdx */
970 EMIT1(0x58); /* pop rax */
984 EMIT1(0x50); /* push rax */
986 EMIT1(0x52); /* push rdx */
997 EMIT1(add_1mod(0x48, AUX_REG));
999 EMIT1(add_1mod(0x40, AUX_REG));
1004 EMIT1(0x5A); /* pop rdx */
1008 EMIT1(0x58); /* pop rax */
1020 EMIT1(add_1mod(0x48, dst_reg));
1022 EMIT1(add_1mod(0x40, dst_reg));
1051 EMIT1(0x51); /* push rcx */
1059 EMIT1(add_1mod(0x48, dst_reg));
1061 EMIT1(add_1mod(0x40, dst_reg));
1071 EMIT1(0x59); /* pop rcx */
1082 EMIT1(0x66);
1084 EMIT1(0x41);
1092 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
1099 EMIT1(0x0F);
1100 EMIT1(add_1reg(0xC8, dst_reg));
1121 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
1126 EMIT1(0x45);
1146 EMIT1(0xC6);
1158 EMIT1(0xC7);
1303 EMIT1(add_2mod(0x48, dst_reg, src_reg));
1305 EMIT1(add_2mod(0x40, dst_reg, src_reg));
1313 EMIT1(add_2mod(0x48, dst_reg, src_reg));
1315 EMIT1(add_2mod(0x40, dst_reg, src_reg));
1323 EMIT1(add_1mod(0x48, dst_reg));
1325 EMIT1(add_1mod(0x40, dst_reg));
1352 EMIT1(add_2mod(0x48, dst_reg, dst_reg));
1354 EMIT1(add_2mod(0x40, dst_reg, dst_reg));
1361 EMIT1(add_1mod(0x48, dst_reg));
1363 EMIT1(add_1mod(0x40, dst_reg));
1461 EMIT1(0xC9); /* leave */
1611 EMIT1(ideal_nops[noplen][i]);
1682 EMIT4(0x48, 0x83, 0x7d, 0xf8); EMIT1(0x00);
1808 EMIT1(0x55); /* push rbp */
1811 EMIT1(0x53); /* push rbx */
1898 EMIT1(0x5B); /* pop rbx */
1899 EMIT1(0xC9); /* leave */
1926 EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */
1947 EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */