Lines Matching refs:tlb_gen
225 *need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) <
508 * Read the tlb_gen to check whether a flush is needed.
510 * The barrier synchronizes with the tlb_gen increment in
514 next_tlb_gen = atomic64_read(&next->context.tlb_gen);
515 if (this_cpu_read(cpu_tlbstate.ctxs[prev_asid].tlb_gen) ==
545 * Start remote flushes and then read tlb_gen.
549 next_tlb_gen = atomic64_read(&next->context.tlb_gen);
560 this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
621 u64 tlb_gen = atomic64_read(&init_mm.context.tlb_gen);
643 this_cpu_write(cpu_tlbstate.ctxs[0].tlb_gen, tlb_gen);
652 * read active_mm's tlb_gen. We don't need any explicit barriers
660 * We have three different tlb_gen values in here. They are:
670 u64 mm_tlb_gen = atomic64_read(&loaded_mm->context.tlb_gen);
671 u64 local_tlb_gen = this_cpu_read(cpu_tlbstate.ctxs[loaded_mm_asid].tlb_gen);
726 * us up to date for tlb_gen 3 is the partial flush we're
731 * changes context.tlb_gen from 1 to 2. The second is a partial
732 * flush that changes context.tlb_gen from 2 to 3. If they get
737 * 1 without the full flush that's needed for tlb_gen 2.
770 this_cpu_write(cpu_tlbstate.ctxs[loaded_mm_asid].tlb_gen, mm_tlb_gen);