Lines Matching defs:exit
190 /* Default doubles per-vcpu window every exit. */
194 /* Default resets per-vcpu window every exit to ple_window. */
957 unsigned long entry, unsigned long exit)
960 vm_exit_controls_clearbit(vmx, exit);
1015 unsigned long entry, unsigned long exit,
1023 vm_exit_controls_setbit(vmx, exit);
1241 /* Reload host state (IA32_RTIT_CTL will be cleared on VM exit). */
1690 * Recognizes a pending MTF VM-exit and records the nested state for later
5082 /* called to set cr0 as appropriate for a mov-to-cr0 exit. */
5237 * As the vm-exit takes precedence over the debug trap, we
5383 /* EOI-induced VM exit is trap-like and thus no need to adjust IP */
5393 /* APIC-write VM exit is trap-like and thus no need to adjust IP */
5502 * would also use advanced VM-exit information for EPT violations to
5641 * so the vcpu must be CPL=0 if it gets a PAUSE exit.
5775 * The exit handlers return 1 if the exit was handled fully and guest execution
6117 * Mark them dirty on every exit from L2 to prevent them from
6148 * The vm-exit can be triggered again after return to guest that
6220 vcpu_unimpl(vcpu, "vmx: unexpected exit reason 0x%x\n",
6514 /* if exit due to PF check for async PF */
6593 * If the VM exit sets the valid bit in the IDT-vectoring
6595 * If the VM exit is due to a double fault.
6848 /* Don't enter VMX if guest state is invalid, let the exit handler
7230 goto exit;
7236 goto exit;
7245 goto exit;
7250 exit:
7569 * exit, i.e. KVM is within its rights to allow L2 to execute