Lines Matching defs:shadow
181 * We don't need to force a shadow sync because
667 struct vmcs12 *shadow;
673 shadow = get_shadow_vmcs12(vcpu);
678 memcpy(shadow, map.hva, VMCS12_SIZE);
754 /* tpr shadow is needed by all apicv features. */
1078 * tl;dr: the MMU needs a sync if L0 is using shadow paging and L1 didn't
1548 * Copy the writable VMCS shadow fields back to the VMCS12, in case they have
2610 /* Shadow page tables on either EPT or shadow page tables. */
2963 struct vmcs12 *shadow;
2975 shadow = map.hva;
2977 if (CC(shadow->hdr.revision_id != VMCS12_REVISION) ||
2978 CC(shadow->hdr.shadow_vmcs != nested_cpu_has_shadow_vmcs(vmcs12)))
3206 * The processor will never use the TPR shadow, simply
3375 * GUEST_CR3 holds KVM's shadow CR3, not L1's "real" CR3, which causes
3380 * guaranteed to be overwritten with a shadow CR3 prior to re-entering
3530 * Can't VMLAUNCH or VMRESUME a shadow VMCS. Despite the fact
4128 * Of course, if L0 is using shadow page tables, GUEST_CR3 was defined
4829 * Allocate a shadow VMCS and associate it with the currently loaded
4830 * VMCS, unless such a shadow VMCS already exists. The newly allocated
4839 * We should allocate a shadow vmcs for vmcs01 only when L1
4842 * here when vmcs01 already have an allocated shadow vmcs.
5267 * dirty shadow vmcs12 instead of vmcs12. Fields that can be updated
5274 * shadow VMCS is up-to-date.
5556 * Sync the shadow page tables if EPT is disabled, L1 is invalidating
5900 * table (shadow on EPT) or a merged EPT table that L0 built
6178 * in the shadow or enlightened vmcs linked to vmcs01, unless