Lines Matching refs:arch
269 u64 old_efer = vcpu->arch.efer;
270 vcpu->arch.efer = efer;
297 vcpu->arch.efer = old_efer;
352 unsigned nr = vcpu->arch.exception.nr;
353 bool has_error_code = vcpu->arch.exception.has_error_code;
354 u32 error_code = vcpu->arch.exception.error_code;
411 vcpu->arch.osvw.length = (osvw_len >= 3) ? (osvw_len) : 3;
412 vcpu->arch.osvw.status = osvw_status & ~(6ULL);
423 vcpu->arch.osvw.status |= 1;
1106 svm->vcpu.arch.hflags = 0;
1194 svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip;
1213 save->g_pat = svm->vcpu.arch.pat;
1220 svm->vcpu.arch.hflags = 0;
1273 svm->vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE |
1276 svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP;
1325 vcpu->arch.microcode_version = 0x01000065;
1383 u64 tsc_ratio = vcpu->arch.tsc_scaling_ratio;
1457 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
1641 ulong gcr0 = svm->vcpu.arch.cr0;
1663 if (vcpu->arch.efer & EFER_LME) {
1665 vcpu->arch.efer |= EFER_LMA;
1670 vcpu->arch.efer &= ~EFER_LMA;
1675 vcpu->arch.cr0 = cr0;
1705 vcpu->arch.cr4 = cr4;
1784 get_debugreg(vcpu->arch.db[0], 0);
1785 get_debugreg(vcpu->arch.db[1], 1);
1786 get_debugreg(vcpu->arch.db[2], 2);
1787 get_debugreg(vcpu->arch.db[3], 3);
1792 vcpu->arch.dr6 = svm->vmcb->save.dr6;
1793 vcpu->arch.dr7 = svm->vmcb->save.dr7;
1794 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_WONT_EXIT;
1851 kvm_run->debug.arch.dr6 = svm->vmcb->save.dr6;
1852 kvm_run->debug.arch.dr7 = svm->vmcb->save.dr7;
1853 kvm_run->debug.arch.pc =
1855 kvm_run->debug.arch.exception = DB_VECTOR;
1867 kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
1868 kvm_run->debug.arch.exception = BP_VECTOR;
2121 if (svm->vcpu.arch.smi_pending ||
2122 svm->vcpu.arch.nmi_pending ||
2236 svm->vcpu.arch.nmi_injected = false;
2279 svm->vcpu.arch.hflags |= HF_IRET_MASK;
2324 unsigned long cr0 = svm->vcpu.arch.cr0;
2395 val = svm->vcpu.arch.cr2;
2429 svm->vcpu.arch.switch_db_regs |= KVM_DEBUGREG_WONT_EXIT;
2617 if (svm_dis && (vcpu->arch.efer & EFER_SVME))
2633 vcpu->arch.pat = data;
3088 vcpu->arch.cr0 = svm->vmcb->save.cr0;
3090 vcpu->arch.cr3 = svm->vmcb->save.cr3;
3110 kvm_run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu;
3127 vcpu->run->internal.data[1] = vcpu->arch.last_vmentry_cpu;
3171 vcpu->arch.hflags |= HF_NMI_MASK;
3180 trace_kvm_inj_virq(vcpu->arch.interrupt.nr);
3183 svm->vmcb->control.event_inj = vcpu->arch.interrupt.nr |
3216 (svm->vcpu.arch.hflags & HF_NMI_MASK);
3238 return !!(svm->vcpu.arch.hflags & HF_NMI_MASK);
3246 svm->vcpu.arch.hflags |= HF_NMI_MASK;
3249 svm->vcpu.arch.hflags &= ~HF_NMI_MASK;
3324 if ((svm->vcpu.arch.hflags & (HF_NMI_MASK | HF_IRET_MASK))
3422 if ((svm->vcpu.arch.hflags & HF_IRET_MASK)
3424 svm->vcpu.arch.hflags &= ~(HF_NMI_MASK | HF_IRET_MASK);
3428 svm->vcpu.arch.nmi_injected = false;
3442 svm->vcpu.arch.nmi_injected = true;
3524 __svm_vcpu_run(svm->vmcb_pa, (unsigned long *)&svm->vcpu.arch.regs);
3559 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
3560 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
3561 svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
3583 svm->vmcb->save.cr2 = vcpu->arch.cr2;
3589 if (unlikely(svm->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT))
3590 svm_set_dr6(svm, vcpu->arch.dr6);
3631 vcpu->arch.cr2 = svm->vmcb->save.cr2;
3632 vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
3633 vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
3634 vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
3660 svm->vcpu.arch.apf.host_apf_flags =
3664 vcpu->arch.regs_avail &= ~(1 << VCPU_EXREG_PDPTR);
3665 vcpu->arch.regs_dirty &= ~(1 << VCPU_EXREG_PDPTR);
3696 if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
3698 cr3 = vcpu->arch.cr3;
3760 vcpu->arch.xsaves_enabled = guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
3775 vcpu->arch.cr3_lm_rsvd_bits &= ~(1UL << (best->ebx & 0x3f));
3904 cr0 = vcpu->arch.cr0 & ~SVM_CR0_SELECTIVE_MASK;
3990 vcpu->arch.at_instruction_boundary = true;
4002 vcpu->arch.mcg_cap &= 0x1ff;
4040 svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
4041 svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
4042 svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
4199 kvm->arch.pause_in_guest = true;