Lines Matching defs:base
2037 role = vcpu->arch.mmu->mmu_role.base;
3808 gfn_t base = (gpa >> PAGE_SHIFT) & ~(page_num - 1);
3810 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4154 context->mmu_role.base.smep_andnot_wp;
4475 role.base.access = ACC_ALL;
4476 role.base.nxe = !!is_nx(vcpu);
4477 role.base.cr0_wp = is_write_protection(vcpu);
4478 role.base.smm = is_smm(vcpu);
4479 role.base.guest_mode = is_guest_mode(vcpu);
4503 role.base.ad_disabled = (shadow_accessed_mask == 0);
4504 role.base.level = kvm_mmu_get_tdp_level(vcpu);
4505 role.base.direct = true;
4506 role.base.gpte_is_8_bytes = true;
4563 role.base.smep_andnot_wp = role.ext.cr4_smep &&
4565 role.base.smap_andnot_wp = role.ext.cr4_smap &&
4567 role.base.gpte_is_8_bytes = !!is_pae(vcpu);
4578 role.base.direct = !is_paging(vcpu);
4581 role.base.level = PT32E_ROOT_LEVEL;
4583 role.base.level = PT64_ROOT_5LEVEL;
4585 role.base.level = PT64_ROOT_4LEVEL;
4623 role.base.direct = false;
4624 role.base.level = kvm_mmu_get_tdp_level(vcpu);
4635 __kvm_mmu_new_pgd(vcpu, nested_cr3, new_role.base, false, false);
4644 context->shadow_root_level = new_role.base.level;
4656 role.base.smm = vcpu->arch.root_mmu.mmu_role.base.smm;
4658 role.base.level = level;
4659 role.base.gpte_is_8_bytes = true;
4660 role.base.direct = false;
4661 role.base.ad_disabled = !accessed_dirty;
4662 role.base.guest_mode = true;
4663 role.base.access = ACC_ALL;
4669 role.base.cr0_wp = true;
4670 role.base.smap_andnot_wp = true;
4687 __kvm_mmu_new_pgd(vcpu, new_eptp, new_role.base, true, true);
4735 role.base.direct = true;
4738 role.base.level = 0;
4740 role.base.level = is_la57_mode(vcpu) ? PT64_ROOT_5LEVEL :
4743 role.base.level = PT32E_ROOT_LEVEL;
4745 role.base.level = PT32_ROOT_LEVEL;
4834 return role.base;