Lines Matching refs:msr_data
2827 u64 msr_data;
2844 ops->get_msr(ctxt, MSR_STAR, &msr_data);
2845 msr_data >>= 32;
2846 cs_sel = (u16)(msr_data & 0xfffc);
2847 ss_sel = (u16)(msr_data + 8);
2863 MSR_LSTAR : MSR_CSTAR, &msr_data);
2864 ctxt->_eip = msr_data;
2866 ops->get_msr(ctxt, MSR_SYSCALL_MASK, &msr_data);
2867 ctxt->eflags &= ~msr_data;
2872 ops->get_msr(ctxt, MSR_STAR, &msr_data);
2873 ctxt->_eip = (u32)msr_data;
2886 u64 msr_data;
2907 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);
2908 if ((msr_data & 0xfffc) == 0x0)
2913 cs_sel = (u16)msr_data & ~SEGMENT_RPL_MASK;
2923 ops->get_msr(ctxt, MSR_IA32_SYSENTER_EIP, &msr_data);
2924 ctxt->_eip = (efer & EFER_LMA) ? msr_data : (u32)msr_data;
2926 ops->get_msr(ctxt, MSR_IA32_SYSENTER_ESP, &msr_data);
2927 *reg_write(ctxt, VCPU_REGS_RSP) = (efer & EFER_LMA) ? msr_data :
2928 (u32)msr_data;
2939 u64 msr_data, rcx, rdx;
2960 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);
2963 cs_sel = (u16)(msr_data + 16);
2964 if ((msr_data & 0xfffc) == 0x0)
2966 ss_sel = (u16)(msr_data + 24);
2971 cs_sel = (u16)(msr_data + 32);
2972 if (msr_data == 0x0)
3771 u64 msr_data;
3774 msr_data = (u32)reg_read(ctxt, VCPU_REGS_RAX)
3776 r = ctxt->ops->set_msr(ctxt, msr_index, msr_data);
3790 u64 msr_data;
3793 r = ctxt->ops->get_msr(ctxt, msr_index, &msr_data);
3801 *reg_write(ctxt, VCPU_REGS_RAX) = (u32)msr_data;
3802 *reg_write(ctxt, VCPU_REGS_RDX) = msr_data >> 32;