Lines Matching refs:VCPU_REGS_RCX
1567 address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) : 1;
2328 ctxt->dst.val64 = ((u64)reg_read(ctxt, VCPU_REGS_RCX) << 32) |
2856 *reg_write(ctxt, VCPU_REGS_RCX) = ctxt->_eip;
2955 rcx = reg_read(ctxt, VCPU_REGS_RCX);
3075 *reg_write(ctxt, VCPU_REGS_RCX) = 0;
3095 tss->cx = reg_read(ctxt, VCPU_REGS_RCX);
3119 *reg_write(ctxt, VCPU_REGS_RCX) = tss->cx;
3209 tss->ecx = reg_read(ctxt, VCPU_REGS_RCX);
3238 *reg_write(ctxt, VCPU_REGS_RCX) = tss->ecx;
3680 if (ctxt->ops->read_pmc(ctxt, reg_read(ctxt, VCPU_REGS_RCX), &pmc))
3770 u64 msr_index = reg_read(ctxt, VCPU_REGS_RCX);
3789 u64 msr_index = reg_read(ctxt, VCPU_REGS_RCX);
3998 register_address_increment(ctxt, VCPU_REGS_RCX, -1);
3999 if ((address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) != 0) &&
4010 if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0)
4065 ecx = reg_read(ctxt, VCPU_REGS_RCX);
4069 *reg_write(ctxt, VCPU_REGS_RCX) = ecx;
4267 ecx = reg_read(ctxt, VCPU_REGS_RCX);
4377 u64 rcx = reg_read(ctxt, VCPU_REGS_RCX);
5079 op->val = reg_read(ctxt, VCPU_REGS_RCX) & 0xff;
5639 if (address_mask(ctxt, reg_read(ctxt, VCPU_REGS_RCX)) == 0) {
5805 register_address_increment(ctxt, VCPU_REGS_RCX, -count);
5812 if ((r->end != 0 || reg_read(ctxt, VCPU_REGS_RCX) & 0x3ff) &&