Lines Matching defs:and
5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
13 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
76 * references and instruction fetches will never occur in special memory
280 * These EFLAGS bits are restored from saved value during emulation, and
306 * and 1 for the straight line speculation INT3, leaves 7 bytes for the
412 /* 2 operand, src and dest are reversed */
696 * aligned, explicitly unaligned, and the rest, which change behaviour
700 * subject to the same check. FXSAVE and FXRSTOR are checked here too as their
936 * We do not know exactly how many bytes will be needed, and
955 * and one has been loaded at the beginning of
1005 * Given the 'reg' portion of a ModRM byte, and a register block, return a
1043 FASTOP2(and);
1725 /* NULL selector is not valid for TR, CS and (except for long mode) SS */
1813 * and (both RPL and CPL > DPL))
1868 * None of MOV, POP and LSS can load a NULL selector in CPL=3, but
1875 * and only forbid it here.
3068 * Intel CPUs mask the counter and pointers in quite strange
3205 /* CR3 and ldt selector are not saved intentionally */
3260 * If we're switching between Protected Mode and VM86, we need to make
3322 /* Only GP registers and segment selectors are saved */
3707 * Both casting ->valptr and ->val to u16 breaks strict aliasing
3739 * CR0 write might have updated CR0.PE and/or CR0.PG
4146 * Hardware doesn't save and restore XMM 0-7 without CR4.OSFXSR, but does save
4147 * and restore MXCSR.
4165 * FXSAVE and FXRSTOR have 4 different formats depending on execution mode,
4168 * - like (1), but FIP and FDP (foo) are only 16 bit. At least Intel CPUs
4169 * preserve whole 32 bit values, though, so (1) and (2) are the same wrt.
4170 * save and restore
4172 * - like (2), but XMM 8-15 are being saved and restored
4174 * - like (3), but FIP and FDP are 64 bit
4176 * Emulation uses (3) for (1) and (2) and preserves XMM 8-15 to reach the
4179 * Note: Guest and host CPUID.(EAX=07H,ECX=0H):EBX[bit 13] (deprecate FPU CS
4180 * and FPU DS) should match.
5396 * These are copied unconditionally here, and checked unconditionally
5428 /* ModRM and SIB bytes. */
5446 * Decode and fetch the source operand: register, memory
5454 * Decode and fetch the second source operand: register, memory
5461 /* Decode and fetch the destination operand: register or memory. */
5482 * and REPNE. Test if the repeat string operation prefix is
5483 * REPE/REPZ or REPNE/REPNZ and if it's the case it tests the
5485 * - if REPE/REPZ and ZF = 0 then done
5486 * - if REPNE/REPNZ and ZF = 1 then done