Lines Matching refs:event
111 PMU_EVENT_ATTR_STRING(tsc, attr_tsc, "event=0x00" );
112 PMU_EVENT_ATTR_STRING(aperf, attr_aperf, "event=0x01" );
113 PMU_EVENT_ATTR_STRING(mperf, attr_mperf, "event=0x02" );
114 PMU_EVENT_ATTR_STRING(pperf, attr_pperf, "event=0x03" );
115 PMU_EVENT_ATTR_STRING(smi, attr_smi, "event=0x04" );
116 PMU_EVENT_ATTR_STRING(ptsc, attr_ptsc, "event=0x05" );
117 PMU_EVENT_ATTR_STRING(irperf, attr_irperf, "event=0x06" );
118 PMU_EVENT_ATTR_STRING(cpu_thermal_margin, attr_therm, "event=0x07" );
164 PMU_FORMAT_ATTR(event, "config:0-63");
191 static int msr_event_init(struct perf_event *event)
193 u64 cfg = event->attr.config;
195 if (event->attr.type != event->pmu->type)
199 if (event->attr.sample_period) /* no sampling */
210 event->hw.idx = -1;
211 event->hw.event_base = msr[cfg].msr;
212 event->hw.config = cfg;
217 static inline u64 msr_read_counter(struct perf_event *event)
221 if (event->hw.event_base)
222 rdmsrl(event->hw.event_base, now);
229 static void msr_event_update(struct perf_event *event)
234 /* Careful, an NMI might modify the previous event value: */
236 prev = local64_read(&event->hw.prev_count);
237 now = msr_read_counter(event);
239 if (local64_cmpxchg(&event->hw.prev_count, prev, now) != prev)
243 if (unlikely(event->hw.event_base == MSR_SMI_COUNT)) {
245 local64_add(delta, &event->count);
246 } else if (unlikely(event->hw.event_base == MSR_IA32_THERM_STATUS)) {
249 local64_set(&event->count, now);
251 local64_add(delta, &event->count);
255 static void msr_event_start(struct perf_event *event, int flags)
257 u64 now = msr_read_counter(event);
259 local64_set(&event->hw.prev_count, now);
262 static void msr_event_stop(struct perf_event *event, int flags)
264 msr_event_update(event);
267 static void msr_event_del(struct perf_event *event, int flags)
269 msr_event_stop(event, PERF_EF_UPDATE);
272 static int msr_event_add(struct perf_event *event, int flags)
275 msr_event_start(event, flags);