Lines Matching refs:event
24 unsigned int escr_msr[2]; /* ESCR MSR for this event */
26 unsigned int shared; /* event is shared across threads */
46 * event configuration to find out which values are to be
68 * event may borrow, it doesn't contain EventMask,
508 #define P4_GEN_CACHE_EVENT(event, bit, metric) \
509 p4_config_pack_escr(P4_ESCR_EVENT(event) | \
510 P4_ESCR_EMASK_BIT(event, bit)) | \
512 P4_CCCR_ESEL(P4_OPCODE_ESEL(P4_OPCODE(event))))
579 * identical events may run simultaneously, we introduce event aliases,
626 * Only event with special mark is allowed,
628 * RAW event.
733 /* INSTR_COMPLETED event only exist for model 3, 4, 6 (Prescott) */
749 static int p4_validate_raw_event(struct perf_event *event)
753 /* User data may have out-of-bound event index */
754 v = p4_config_unpack_event(event->attr.config);
766 * depends on logical cpu state -- count event if one cpu active,
775 * if an event is shared across the logical threads
779 v = perf_allow_cpu(&event->attr);
785 emask = p4_config_unpack_escr(event->attr.config) & P4_ESCR_EVENTMASK_MASK;
792 if (p4_config_pebs_has(event->attr.config, P4_PEBS_CONFIG_ENABLE))
795 v = p4_config_unpack_metric(event->attr.config);
802 static int p4_hw_config(struct perf_event *event)
815 escr = p4_default_escr_conf(cpu, event->attr.exclude_kernel,
816 event->attr.exclude_user);
817 event->hw.config = p4_config_pack_escr(escr) |
821 event->hw.config = p4_set_ht_bit(event->hw.config);
823 if (event->attr.type == PERF_TYPE_RAW) {
830 event->attr.config &= P4_CONFIG_MASK;
832 rc = p4_validate_raw_event(event);
840 event->hw.config |= event->attr.config;
841 bind = p4_config_get_bind(event->attr.config);
847 event->hw.config |= p4_config_pack_cccr(P4_CCCR_ESEL(esel));
850 rc = x86_setup_perfctr(event);
892 * reason) will pass some cache event metric with improper
893 * event opcode -- it's fine from hardware point of view
904 static inline void p4_pmu_disable_event(struct perf_event *event)
906 struct hw_perf_event *hwc = &event->hw;
909 * If event gets disabled while counter is in overflowed
923 struct perf_event *event = cpuc->events[idx];
926 p4_pmu_disable_event(event);
950 static void p4_pmu_enable_event(struct perf_event *event)
952 struct hw_perf_event *hwc = &event->hw;
976 * it could be Cache event so we need to write metrics
992 struct perf_event *event = cpuc->events[idx];
995 p4_pmu_enable_event(event);
1003 struct perf_event *event;
1020 event = cpuc->events[idx];
1021 hwc = &event->hw;
1028 val = x86_perf_event_update(event);
1034 /* event overflow for sure */
1037 if (!x86_perf_event_set_period(event))
1041 if (perf_event_overflow(event, &data, regs))
1042 x86_pmu_stop(event, 0);
1078 * the event is migrated from an another logical
1252 * Check whether an event alias is still available.