Lines Matching refs:x86_pmu
181 if (x86_pmu.pebs_no_tlb) {
339 size_t bsiz = x86_pmu.pebs_buffer_size;
343 if (!x86_pmu.pebs)
354 if (x86_pmu.intel_cap.pebs_format < 2) {
368 max = x86_pmu.pebs_record_size * (bsiz / x86_pmu.pebs_record_size);
378 if (!x86_pmu.pebs)
386 ds_clear_cea(cea, x86_pmu.pebs_buffer_size);
387 dsfree_pages(hwev->ds_pebs_vaddr, x86_pmu.pebs_buffer_size);
398 if (!x86_pmu.bts)
425 if (!x86_pmu.bts)
453 if (!x86_pmu.bts && !x86_pmu.pebs)
479 x86_pmu.bts_active = 0;
480 x86_pmu.pebs_active = 0;
482 if (!x86_pmu.bts && !x86_pmu.pebs)
485 if (!x86_pmu.bts)
488 if (!x86_pmu.pebs)
521 if (x86_pmu.bts && !bts_err)
522 x86_pmu.bts_active = 1;
524 if (x86_pmu.pebs && !pebs_err)
525 x86_pmu.pebs_active = 1;
601 if (!x86_pmu.bts_active)
675 x86_pmu.drain_pebs(NULL, &data);
885 if (x86_pmu.pebs_constraints) {
886 for_each_event_constraint(c, x86_pmu.pebs_constraints) {
898 if (x86_pmu.flags & PMU_FL_PEBS_ALL)
934 if (x86_pmu.flags & PMU_FL_PEBS_ALL)
935 reserved = x86_pmu.max_pebs_events + x86_pmu.num_counters_fixed;
937 reserved = x86_pmu.max_pebs_events;
962 sz += x86_pmu.lbr_nr * sizeof(struct lbr_entry);
996 x86_pmu.rtm_abort_event);
1011 ((x86_pmu.lbr_nr-1) << PEBS_DATACFG_LBR_SHIFT);
1042 if (x86_pmu.intel_cap.pebs_baseline && add) {
1118 if ((event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT) && (x86_pmu.version < 5))
1123 if (x86_pmu.intel_cap.pebs_baseline) {
1141 (u64)(-hwc->sample_period) & x86_pmu.cntval_mask;
1176 (x86_pmu.version < 5))
1218 if (!x86_pmu.intel_cap.pebs_trap)
1320 if (x86_pmu.intel_cap.pebs_format < 4)
1435 if (x86_pmu.intel_cap.pebs_format >= 2) {
1460 x86_pmu.intel_cap.pebs_format >= 1)
1463 if (x86_pmu.intel_cap.pebs_format >= 2) {
1479 if (x86_pmu.intel_cap.pebs_format >= 3 &&
1632 if (x86_pmu.intel_cap.pebs_format < 1)
1643 if (x86_pmu.intel_cap.pebs_format >= 3)
1675 int shift = 64 - x86_pmu.cntval_bits;
1797 if (!x86_pmu.pebs_active)
1857 if (!x86_pmu.pebs_active)
1865 mask = (1ULL << x86_pmu.max_pebs_events) - 1;
1866 size = x86_pmu.max_pebs_events;
1867 if (x86_pmu.flags & PMU_FL_PEBS_ALL) {
1868 mask |= ((1ULL << x86_pmu.num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED;
1869 size = INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed;
1877 for (at = base; at < top; at += x86_pmu.pebs_record_size) {
1885 if (x86_pmu.intel_cap.pebs_format >= 3) {
1905 x86_pmu.max_pebs_events);
1906 if (bit >= x86_pmu.max_pebs_events)
1970 if (!x86_pmu.pebs_active)
1978 mask = ((1ULL << x86_pmu.max_pebs_events) - 1) |
1979 (((1ULL << x86_pmu.num_counters_fixed) - 1) << INTEL_PMC_IDX_FIXED);
1980 size = INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed;
2026 x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS);
2027 x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);
2028 x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE;
2029 if (x86_pmu.version <= 4)
2030 x86_pmu.pebs_no_isolation = 1;
2032 if (x86_pmu.pebs) {
2033 char pebs_type = x86_pmu.intel_cap.pebs_trap ? '+' : '-';
2035 int format = x86_pmu.intel_cap.pebs_format;
2038 x86_pmu.intel_cap.pebs_baseline = 0;
2043 x86_pmu.pebs_record_size = sizeof(struct pebs_record_core);
2051 x86_pmu.pebs_buffer_size = PAGE_SIZE;
2052 x86_pmu.drain_pebs = intel_pmu_drain_pebs_core;
2057 x86_pmu.pebs_record_size = sizeof(struct pebs_record_nhm);
2058 x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
2063 x86_pmu.pebs_record_size = sizeof(struct pebs_record_hsw);
2064 x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
2069 x86_pmu.pebs_record_size =
2071 x86_pmu.drain_pebs = intel_pmu_drain_pebs_nhm;
2072 x86_pmu.large_pebs_flags |= PERF_SAMPLE_TIME;
2076 x86_pmu.drain_pebs = intel_pmu_drain_pebs_icl;
2077 x86_pmu.pebs_record_size = sizeof(struct pebs_basic);
2078 if (x86_pmu.intel_cap.pebs_baseline) {
2079 x86_pmu.large_pebs_flags |=
2082 x86_pmu.flags |= PMU_FL_PEBS_ALL;
2087 x86_pmu.large_pebs_flags &=
2097 if (x86_pmu.intel_cap.pebs_output_pt_available) {
2106 x86_pmu.pebs = 0;
2115 if (!x86_pmu.bts && !x86_pmu.pebs)