Lines Matching refs:perf_iommu
183 static int clear_avail_iommu_bnk_cntr(struct perf_amd_iommu *perf_iommu,
190 max_banks = perf_iommu->max_banks;
191 max_cntrs = perf_iommu->max_counters;
198 raw_spin_lock_irqsave(&perf_iommu->lock, flags);
199 perf_iommu->cntr_assign_mask &= ~(1ULL<<shift);
200 raw_spin_unlock_irqrestore(&perf_iommu->lock, flags);
367 struct perf_amd_iommu *perf_iommu =
373 clear_avail_iommu_bnk_cntr(perf_iommu,
419 struct perf_amd_iommu *perf_iommu;
422 perf_iommu = kzalloc(sizeof(struct perf_amd_iommu), GFP_KERNEL);
423 if (!perf_iommu)
426 raw_spin_lock_init(&perf_iommu->lock);
428 perf_iommu->pmu = iommu_pmu;
429 perf_iommu->iommu = get_amd_iommu(idx);
430 perf_iommu->max_banks = amd_iommu_pc_get_max_banks(idx);
431 perf_iommu->max_counters = amd_iommu_pc_get_max_counters(idx);
433 if (!perf_iommu->iommu ||
434 !perf_iommu->max_banks ||
435 !perf_iommu->max_counters) {
436 kfree(perf_iommu);
440 snprintf(perf_iommu->name, IOMMU_NAME_SIZE, "amd_iommu_%u", idx);
442 ret = perf_pmu_register(&perf_iommu->pmu, perf_iommu->name, -1);
445 idx, perf_iommu->max_banks, perf_iommu->max_counters);
446 list_add_tail(&perf_iommu->list, &perf_amd_iommu_list);
449 kfree(perf_iommu);