Lines Matching refs:start
46 .start = 0xfd000000,
51 .start = 0xc0000000,
56 .start = 0x10000000,
61 .start = 0xfe100000,
70 .start = 0xfd800000,
75 .start = 0xa0000000,
80 .start = 0x30000000,
85 .start = 0xfe300000,
94 .start = 0xfc800000,
99 .start = 0x80000000,
104 .start = 0x20000000,
109 .start = 0xfcd00000,
117 #define DEFINE_CONTROLLER(start, idx) \
122 .reg_base = start, \
146 dev->resource[i].start = 0;
366 * The start address must be aligned on its size. So we round
466 pci_write_reg(chan, upper_32_bits(res->start),
468 pci_write_reg(chan, lower_32_bits(res->start),
600 port->hose->io_map_base = port->hose->resources[0].start;