Lines Matching refs:response
100 struct clp_rsp_query_pci_grp *response)
102 zdev->tlb_refresh = response->refresh;
103 zdev->dma_mask = response->dasm;
104 zdev->msi_addr = response->msia;
105 zdev->max_msi = response->noi;
106 zdev->fmb_update = response->mui;
107 zdev->version = response->version;
109 switch (response->version) {
131 rrb->response.hdr.len = sizeof(rrb->response);
135 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
136 clp_store_query_pci_fngrp(zdev, &rrb->response);
139 zpci_err_clp(rrb->response.hdr.rsp, rc);
147 struct clp_rsp_query_pci *response)
152 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
153 zdev->bars[i].size = response->bar_size[i];
155 zdev->start_dma = response->sdma;
156 zdev->end_dma = response->edma;
157 zdev->pchid = response->pchid;
158 zdev->pfgid = response->pfgid;
159 zdev->pft = response->pft;
160 zdev->vfn = response->vfn;
161 zdev->port = response->port;
162 zdev->uid = response->uid;
163 zdev->fmb_length = sizeof(u32) * response->fmb_len;
164 zdev->rid_available = response->rid_avail;
165 zdev->is_physfn = response->is_physfn;
167 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
169 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
170 if (response->util_str_avail) {
171 memcpy(zdev->util_str, response->util_str,
175 zdev->mio_capable = response->mio_addr_avail;
177 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
180 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
181 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
198 rrb->response.hdr.len = sizeof(rrb->response);
202 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
203 rc = clp_store_query_pci_fn(zdev, &rrb->response);
206 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
209 zpci_err_clp(rrb->response.hdr.rsp, rc);
240 rrb->response.hdr.len = sizeof(rrb->response);
246 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
252 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
254 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
255 zdev->fh = rrb->response.fh;
256 } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY) {
261 zpci_err_clp(rrb->response.hdr.rsp, rc);
263 rc = rrb->response.hdr.rsp;
282 rrb->response.hdr.len = sizeof(rrb->response);
285 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
286 if (rrb->response.vwb) {
287 wb_bit_pos = rrb->response.mio_wb;
296 zpci_err_clp(rrb->response.hdr.rsp, rc);
342 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
347 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
349 zpci_err_clp(rrb->response.hdr.rsp, rc);
354 update_uid_checking(rrb->response.uid_checking);
355 WARN_ON_ONCE(rrb->response.entry_size !=
358 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
359 rrb->response.entry_size;
361 resume_token = rrb->response.resume_token;
363 cb(&rrb->response.fh_list[i], data);
470 lpcb->response.hdr.len > limit)
490 lpcb->response.hdr.len > limit)
500 lpcb->response.hdr.len > limit)
513 lpcb->response.hdr.len > limit)
526 lpcb->response.hdr.len > limit)