Lines Matching refs:set
21 int set = CPUMF_CTR_SET_MAX;
24 set = CPUMF_CTR_SET_BASIC;
26 set = CPUMF_CTR_SET_USER;
28 set = CPUMF_CTR_SET_CRYPTO;
30 set = CPUMF_CTR_SET_EXT;
32 set = CPUMF_CTR_SET_MT_DIAG;
34 return set;
72 * MT-diagnostic counters are read-only. The counter set
75 * also disables the counter set. State changes are ignored
77 * a kernel parameter only, the counter set is either disabled
81 * counter set is enabled and active.
104 * If the particular CPU counter set is not authorized,
181 /* CPUMF <-> perf event mappings for kernel+userspace (basic set) */
191 /* CPUMF <-> perf event mappings for userspace (problem-state set) */
206 enum cpumf_ctr_set set;
252 /* Obtain the counter set to which the specified counter belongs */
253 set = get_counter_set(ev);
254 switch (set) {
263 * set number in the 'config_base'. The counter set number
267 hwc->config_base = set;
270 /* The counter could not be associated to a counter set */
287 /* Finally, validate version and authorization of the counter set */
301 * exclude_user are also set.
346 * might happen if the counter set to which
398 /* (Re-)enable and activate the counter set */
402 /* The counter set to which this counter belongs can be already active.
403 * Because all counters in a set are active, the event->hw.prev_count
404 * needs to be synchronized. At this point, the counter set can be in
409 /* increment refcount for this counter set */
419 /* Decrement reference count for this counter set and if this
420 * is the last used counter in the set, clear activation
421 * control and set the counter set state to inactive.
438 /* Check authorization for the counter set to which this
464 /* Check if any counter in the counter set is still used. If not used,
465 * change the counter set to the disabled state. This also clears the
466 * content of all counters in the set.
469 * clear enable control and resets all counters in a set. Therefore,
470 * cpumf_pmu_start() always has to reenable a counter set.