Lines Matching defs:operand
57 /* An array of operand codes. Each code is an index into the
58 operand table. They appear in the order which the operands must
234 /* A bitmask of bits in the operand. */
237 /* The shift operation to be applied to the operand. No shift
238 is made if this is zero. For positive values, the operand
239 is shifted left by SHIFT. For negative values, the operand
242 operand goes in the insn. */
246 operand value into an instruction, check this field.
254 this structure, and op is the operand value).
257 instruction and the operand value. It will return the new value
259 the operand value is illegal, *ERRMSG will be set to a warning
260 string (the operand will be inserted in any case). If the
261 operand value is legal, *ERRMSG will be unchanged (most operands
267 extract this operand type from an instruction, check this field.
280 instruction value. It will return the value of the operand. If
282 non-zero if this operand type can not actually be extracted from
283 this operand (i.e., the instruction does not match). If the
284 operand is valid, *INVALID will not be changed. */
298 that BITM and SHIFT cannot be used to determine where the operand
304 /* This operand takes signed values. */
307 /* This operand takes signed values, but also accepts a full positive
313 /* This operand does not actually exist in the assembler input. This
321 /* The next operand should be wrapped in parentheses rather than
328 /* This operand may use the symbolic names for the CR fields, which
337 /* This operand names a register. The disassembler uses this to print
344 /* This operand names a floating point register. The disassembler
348 /* This operand is a relative branch displacement. The disassembler
352 /* This operand is an absolute branch address. The disassembler
356 /* This operand is optional, and is zero if omitted. This is used for
360 whether this operand is present or not. The disassembler should
361 print this operand out only if it is not zero. */
364 /* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
365 is omitted, then for the next operand use this operand value plus
366 1, ignoring the next operand field for the opcode. This wretched
368 either 4 or 5 operands. The disassembler should print this operand
372 /* This operand should be regarded as a negative number for the
376 operand. */
379 /* This operand names a vector unit register. The disassembler
383 /* This operand is for the DS field in a DS form instruction. */
386 /* This operand is for the DQ field in a DQ form instruction. */
389 /* Valid range of operand is 0..n rather than 0..n-1. */
397 /* This operand names a vector-scalar unit register. The disassembler
404 /* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
405 is omitted, then the value it should use for the operand is stored
406 in the SHIFT field of the immediatly following operand field. */
409 /* This flag is only used with PPC_OPERAND_OPTIONAL. The operand is
432 Each %N in the string is replaced with operand number N (zero
443 ppc_optional_operand_value (const struct powerpc_operand *operand)
445 if ((operand->flags & PPC_OPERAND_OPTIONAL_VALUE) != 0)
446 return (operand+1)->shift;