Lines Matching refs:X_MASK
2621 #define X_MASK XRC (0x3f, 0x3ff, 1)
2624 #define XBF_MASK (X_MASK | (3 << 21))
2676 /* An X_MASK with the RA/VA field fixed. */
2677 #define XRA_MASK (X_MASK | RA_MASK)
2684 /* An X_MASK with the RB field fixed. */
2685 #define XRB_MASK (X_MASK | RB_MASK)
2687 /* An X_MASK with the RT field fixed. */
2688 #define XRT_MASK (X_MASK | RT_MASK)
2693 /* An X_MASK with the RA and RB fields fixed. */
2694 #define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)
2705 /* An X_MASK with the RT and RA fields fixed. */
2706 #define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)
2708 /* An X_MASK with the RT and RB fields fixed. */
2709 #define XRTRB_MASK (X_MASK | RT_MASK | RB_MASK)
2714 /* An X_MASK with the RT, RA and RB fields fixed. */
2715 #define XRTRARB_MASK (X_MASK | RT_MASK | RA_MASK | RB_MASK)
2745 #define XCMP_MASK (X_MASK | (((unsigned long)1) << 22))
2753 #define XTO_MASK (X_MASK | TO_MASK)
2757 #define XTLB_MASK (X_MASK | SH_MASK)
2768 /* An X_MASK, but with the EH bit clear. */
2769 #define XEH_MASK (X_MASK & ~((unsigned long )1))
2847 #define XFXFXM_MASK (X_MASK | (1 << 11) | (1 << 20))
2857 #define XSPR_MASK (X_MASK | SPR_MASK)
3042 {"attn", X(0,256), X_MASK, POWER4|PPCA2, PPC476|PPCVLE, {0}},
3106 {"mulhhwu", XRC(4, 8,0), X_MASK, MULHW, 0, {RT, RA, RB}},
3107 {"mulhhwu.", XRC(4, 8,1), X_MASK, MULHW, 0, {RT, RA, RB}},
3182 {"mulhhw", XRC(4, 40,0), X_MASK, MULHW, 0, {RT, RA, RB}},
3184 {"mulhhw.", XRC(4, 40,1), X_MASK, MULHW, 0, {RT, RA, RB}},
3225 {"mulchwu", XRC(4, 136,0), X_MASK, MULHW, 0, {RT, RA, RB}},
3227 {"mulchwu.", XRC(4, 136,1), X_MASK, MULHW, 0, {RT, RA, RB}},
3238 {"mulchw", XRC(4, 168,0), X_MASK, MULHW, 0, {RT, RA, RB}},
3239 {"mulchw.", XRC(4, 168,1), X_MASK, MULHW, 0, {RT, RA, RB}},
3452 {"mullhwu", XRC(4, 392,0), X_MASK, MULHW, 0, {RT, RA, RB}},
3454 {"mullhwu.", XRC(4, 392,1), X_MASK, MULHW, 0, {RT, RA, RB}},
3491 {"mullhw", XRC(4, 424,0), X_MASK, MULHW, 0, {RT, RA, RB}},
3492 {"mullhw.", XRC(4, 424,1), X_MASK, MULHW, 0, {RT, RA, RB}},
4405 {"dnh", X(19,198), X_MASK, E500MC, PPCVLE, {DUI, DUIS}},
4697 {"tw", X(31,4), X_MASK, PPCCOM, 0, {TO, RA, RB}},
4698 {"t", X(31,4), X_MASK, PWRCOM, 0, {TO, RA, RB}},
4700 {"lvsl", X(31,6), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
4701 {"lvebx", X(31,7), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
4724 {"isellt", X(31,15), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
4729 {"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, 0, {T, RA0, RB}},
4736 {"ldx", X(31,21), X_MASK, PPC64, 0, {RT, RA0, RB}},
4738 {"icbt", X(31,22), X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0, {CT, RA0, RB}},
4740 {"lwzx", X(31,23), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
4741 {"lx", X(31,23), X_MASK, PWRCOM, 0, {RT, RA, RB}},
4743 {"slw", XRC(31,24,0), X_MASK, PPCCOM, 0, {RA, RS, RB}},
4744 {"sl", XRC(31,24,0), X_MASK, PWRCOM, 0, {RA, RS, RB}},
4745 {"slw.", XRC(31,24,1), X_MASK, PPCCOM, 0, {RA, RS, RB}},
4746 {"sl.", XRC(31,24,1), X_MASK, PWRCOM, 0, {RA, RS, RB}},
4753 {"sld", XRC(31,27,0), X_MASK, PPC64, 0, {RA, RS, RB}},
4754 {"sld.", XRC(31,27,1), X_MASK, PPC64, 0, {RA, RS, RB}},
4756 {"and", XRC(31,28,0), X_MASK, COM, 0, {RA, RS, RB}},
4757 {"and.", XRC(31,28,1), X_MASK, COM, 0, {RA, RS, RB}},
4759 {"maskg", XRC(31,29,0), X_MASK, M601, PPCA2, {RA, RS, RB}},
4760 {"maskg.", XRC(31,29,1), X_MASK, M601, PPCA2, {RA, RS, RB}},
4762 {"ldepx", X(31,29), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
4767 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
4774 {"lvsr", X(31,38), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
4775 {"lvehx", X(31,39), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
4778 {"mviwsplt", X(31,46), X_MASK, PPCVEC2, 0, {VD, RA, RB}},
4780 {"iselgt", X(31,47), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
4782 {"lvewx", X(31,71), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
4788 {"iseleq", X(31,79), X_MASK, PPCISEL, 0, {RT, RA0, RB}},
4800 {"eratilx", X(31,51), X_MASK, PPCA2, 0, {ERAT_T, RA, RB}},
4804 {"ldux", X(31,53), X_MASK, PPC64, 0, {RT, RAL, RB}},
4808 {"lwzux", X(31,55), X_MASK, PPCCOM, 0, {RT, RAL, RB}},
4809 {"lux", X(31,55), X_MASK, PWRCOM, 0, {RT, RA, RB}},
4814 {"andc", XRC(31,60,0), X_MASK, COM, 0, {RA, RS, RB}},
4815 {"andc.", XRC(31,60,1), X_MASK, COM, 0, {RA, RS, RB}},
4838 {"td", X(31,68), X_MASK, PPC64, 0, {TO, RA, RB}},
4847 {"dlmzb", XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}},
4848 {"dlmzb.", XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, 0, {RA, RS, RB}},
4859 {"lbzx", X(31,87), X_MASK, COM, 0, {RT, RA0, RB}},
4861 {"lbepx", X(31,95), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
4865 {"lvx", X(31,103), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
4874 {"mvidsplt", X(31,110), X_MASK, PPCVEC2, 0, {VD, RA, RB}},
4886 {"lbzux", X(31,119), X_MASK, COM, 0, {RT, RAL, RB}},
4890 {"not", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RBS}},
4891 {"nor", XRC(31,124,0), X_MASK, COM, 0, {RA, RS, RB}},
4892 {"not.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RBS}},
4893 {"nor.", XRC(31,124,1), X_MASK, COM, 0, {RA, RS, RB}},
4901 {"dcbtstls", X(31,134), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
4903 {"stvebx", X(31,135), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
4919 {"dcbtstlse", X(31,142), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
4929 {"eratsx", XRC(31,147,0), X_MASK, PPCA2, 0, {RT, RA0, RB}},
4930 {"eratsx.", XRC(31,147,1), X_MASK, PPCA2, 0, {RT, RA0, RB}},
4932 {"stdx", X(31,149), X_MASK, PPC64, 0, {RS, RA0, RB}},
4934 {"stwcx.", XRC(31,150,1), X_MASK, PPC, 0, {RS, RA0, RB}},
4936 {"stwx", X(31,151), X_MASK, PPCCOM, 0, {RS, RA0, RB}},
4937 {"stx", X(31,151), X_MASK, PWRCOM, 0, {RS, RA, RB}},
4939 {"slq", XRC(31,152,0), X_MASK, M601, 0, {RA, RS, RB}},
4940 {"slq.", XRC(31,152,1), X_MASK, M601, 0, {RA, RS, RB}},
4942 {"sle", XRC(31,153,0), X_MASK, M601, 0, {RA, RS, RB}},
4943 {"sle.", XRC(31,153,1), X_MASK, M601, 0, {RA, RS, RB}},
4947 {"stdepx", X(31,157), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
4949 {"stwepx", X(31,159), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
4953 {"dcbtls", X(31,166), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
4955 {"stvehx", X(31,167), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
4961 {"dcbtlse", X(31,174), X_MASK, PPCCHLK, E500MC, {CT, RA0, RB}},
4968 {"eratre", X(31,179), X_MASK, PPCA2, 0, {RT, RA, WS}},
4970 {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}},
4972 {"stqcx.", XRC(31,182,1), X_MASK, POWER8, 0, {RSQ, RA0, RB}},
4973 {"wchkall", X(31,182), X_MASK, PPCA2, 0, {OBF}},
4975 {"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}},
4976 {"stux", X(31,183), X_MASK, PWRCOM, 0, {RS, RA0, RB}},
4978 {"sliq", XRC(31,184,0), X_MASK, M601, 0, {RA, RS, SH}},
4979 {"sliq.", XRC(31,184,1), X_MASK, M601, 0, {RA, RS, SH}},
4985 {"icblq.", XRC(31,198,1), X_MASK, E6500, 0, {CT, RA0, RB}},
4987 {"stvewx", X(31,199), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
5007 {"eratwe", X(31,211), X_MASK, PPCA2, 0, {RS, RA, WS}},
5009 {"ldawx.", XRC(31,212,1), X_MASK, PPCA2, 0, {RT, RA0, RB}},
5011 {"stdcx.", XRC(31,214,1), X_MASK, PPC64, 0, {RS, RA0, RB}},
5013 {"stbx", X(31,215), X_MASK, COM, 0, {RS, RA0, RB}},
5015 {"sllq", XRC(31,216,0), X_MASK, M601, 0, {RA, RS, RB}},
5016 {"sllq.", XRC(31,216,1), X_MASK, M601, 0, {RA, RS, RB}},
5018 {"sleq", XRC(31,217,0), X_MASK, M601, 0, {RA, RS, RB}},
5019 {"sleq.", XRC(31,217,1), X_MASK, M601, 0, {RA, RS, RB}},
5021 {"stbepx", X(31,223), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
5025 {"icblc", X(31,230), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
5027 {"stvx", X(31,231), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
5048 {"icblce", X(31,238), X_MASK, PPCCHLK, E500MC|PPCA2, {CT, RA, RB}},
5058 {"dcbtst", X(31,246), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
5059 {"dcbtst", X(31,246), X_MASK, DCBT_EO, 0, {CT, RA0, RB}},
5060 {"dcbtst", X(31,246), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
5062 {"stbux", X(31,247), X_MASK, COM, 0, {RS, RAS, RB}},
5064 {"slliq", XRC(31,248,0), X_MASK, M601, 0, {RA, RS, SH}},
5065 {"slliq.", XRC(31,248,1), X_MASK, M601, 0, {RA, RS, SH}},
5067 {"bpermd", X(31,252), X_MASK, POWER7|PPCA2, 0, {RA, RS, RB}},
5069 {"dcbtstep", XRT(31,255,0), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
5071 {"mfdcrx", X(31,259), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RS, RA}},
5072 {"mfdcrx.", XRC(31,259,1), X_MASK, PPCA2, 0, {RS, RA}},
5074 {"lvexbx", X(31,261), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5078 {"lvepxl", X(31,263), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5084 {"modud", X(31,265), X_MASK, POWER9, 0, {RT, RA, RB}},
5091 {"moduw", X(31,267), X_MASK, POWER9, 0, {RT, RA, RB}},
5098 {"tlbiel", X(31,274), X_MASK|1<<20,POWER9, PPC476, {RB, RSO, RIC, PRS, X_R}},
5101 {"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}},
5105 {"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}},
5106 {"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}},
5109 {"dcbt", X(31,278), X_MASK, POWER4, DCBT_EO, {RA0, RB, CT}},
5110 {"dcbt", X(31,278), X_MASK, DCBT_EO, 0, {CT, RA0, RB}},
5111 {"dcbt", X(31,278), X_MASK, PPC, POWER4|DCBT_EO, {RA0, RB}},
5113 {"lhzx", X(31,279), X_MASK, COM, 0, {RT, RA0, RB}},
5117 {"eqv", XRC(31,284,0), X_MASK, COM, 0, {RA, RS, RB}},
5118 {"eqv.", XRC(31,284,1), X_MASK, COM, 0, {RA, RS, RB}},
5120 {"lhepx", X(31,287), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
5122 {"mfdcrux", X(31,291), X_MASK, PPC464, 0, {RS, RA}},
5124 {"lvexhx", X(31,293), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5125 {"lvepx", X(31,295), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5129 {"mfbhrbe", X(31,302), X_MASK, POWER8, 0, {RT, BHRBE}},
5131 {"tlbie", X(31,306), X_MASK|1<<20,POWER9, TITAN, {RB, RS, RIC, PRS, X_R}},
5138 {"ldmx", X(31,309), X_MASK, POWER9, 0, {RT, RA0, RB}},
5140 {"eciwx", X(31,310), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
5142 {"lhzux", X(31,311), X_MASK, COM, 0, {RT, RAL, RB}},
5146 {"xor", XRC(31,316,0), X_MASK, COM, 0, {RA, RS, RB}},
5147 {"xor.", XRC(31,316,1), X_MASK, COM, 0, {RA, RS, RB}},
5149 {"dcbtep", XRT(31,319,0), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
5185 {"mfdcr", X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
5186 {"mfdcr.", XRC(31,323,1), X_MASK, PPCA2, 0, {RT, SPR}},
5188 {"lvexwx", X(31,325), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5190 {"dcread", X(31,326), X_MASK, PPC476|TITAN, 0, {RT, RA0, RB}},
5197 {"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, 0, {RT, PMR}},
5198 {"mftmr", X(31,366), X_MASK, PPCTMR|E6500, 0, {RT, TMR}},
5250 {"mftb", X(31,339), X_MASK, POWER4|BOOKE, 0, {RT, TBR}},
5402 {"mfspr", X(31,339), X_MASK, COM, 0, {RT, SPR}},
5404 {"lwax", X(31,341), X_MASK, PPC64, 0, {RT, RA0, RB}},
5408 {"lhax", X(31,343), X_MASK, COM, 0, {RT, RA0, RB}},
5410 {"lvxl", X(31,359), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
5423 {"mftb", X(31,371), X_MASK, PPC, NO371|POWER4, {RT, TBR}},
5426 {"lwaux", X(31,373), X_MASK, PPC64, 0, {RT, RAL, RB}},
5430 {"lhaux", X(31,375), X_MASK, COM, 0, {RT, RAL, RB}},
5434 {"mtdcrx", X(31,387), X_MASK, BOOKE|PPCA2|PPC476, TITAN, {RA, RS}},
5435 {"mtdcrx.", XRC(31,387,1), X_MASK, PPCA2, 0, {RA, RS}},
5437 {"stvexbx", X(31,389), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
5439 {"dcblc", X(31,390), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
5450 {"dcblce", X(31,398), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}},
5456 {"pbt.", XRC(31,404,1), X_MASK, POWER8, 0, {RS, RA0, RB}},
5458 {"icswx", XRC(31,406,0), X_MASK, POWER7|PPCA2, 0, {RS, RA, RB}},
5459 {"icswx.", XRC(31,406,1), X_MASK, POWER7|PPCA2, 0, {RS, RA, RB}},
5461 {"sthx", X(31,407), X_MASK, COM, 0, {RS, RA0, RB}},
5463 {"orc", XRC(31,412,0), X_MASK, COM, 0, {RA, RS, RB}},
5464 {"orc.", XRC(31,412,1), X_MASK, COM, 0, {RA, RS, RB}},
5466 {"sthepx", X(31,415), X_MASK, E500MC|PPCA2, 0, {RS, RA0, RB}},
5468 {"mtdcrux", X(31,419), X_MASK, PPC464, 0, {RA, RS}},
5470 {"stvexhx", X(31,421), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
5472 {"dcblq.", XRC(31,422,1), X_MASK, E6500, 0, {CT, RA0, RB}},
5487 {"ecowx", X(31,438), X_MASK, PPC, E500|TITAN, {RT, RA0, RB}},
5489 {"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
5500 {"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RBS}},
5501 {"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
5502 {"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RBS}},
5503 {"or.", XRC(31,444,1), X_MASK, COM, 0, {RA, RS, RB}},
5539 {"mtdcr", X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
5540 {"mtdcr.", XRC(31,451,1), X_MASK, PPCA2, 0, {SPR, RS}},
5542 {"stvexwx", X(31,453), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
5553 {"mtpmr", X(31,462), X_MASK, PPCPMR|PPCE300, 0, {PMR, RS}},
5554 {"mttmr", X(31,494), X_MASK, PPCTMR|E6500, 0, {TMR, RS}},
5722 {"mtspr", X(31,467), X_MASK, COM, 0, {SPR, RS}},
5726 {"nand", XRC(31,476,0), X_MASK, COM, 0, {RA, RS, RB}},
5727 {"nand.", XRC(31,476,1), X_MASK, COM, 0, {RA, RS, RB}},
5731 {"dcread", X(31,486), X_MASK, PPC403|PPC440, PPCA2|PPC476, {RT, RA0, RB}},
5733 {"icbtls", X(31,486), X_MASK, PPCCHLK|PPC476|TITAN, 0, {CT, RA0, RB}},
5735 {"stvxl", X(31,487), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
5746 {"icbtlse", X(31,494), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}},
5755 {"cmpb", X(31,508), X_MASK, POWER6|PPCA2|PPC476, 0, {RA, RS, RB}},
5759 {"lbdcbx", X(31,514), X_MASK, E200Z4, 0, {RT, RA, RB}},
5760 {"lbdx", X(31,515), X_MASK, E500MC, 0, {RT, RA, RB}},
5762 {"bblels", X(31,518), X_MASK, PPCBRLK, 0, {0}},
5764 {"lvlx", X(31,519), X_MASK, CELL, 0, {VD, RA0, RB}},
5783 {"ldbrx", X(31,532), X_MASK, CELL|POWER7|PPCA2, 0, {RT, RA0, RB}},
5785 {"lswx", X(31,533), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, RBX}},
5786 {"lsx", X(31,533), X_MASK, PWRCOM, 0, {RT, RA, RB}},
5788 {"lwbrx", X(31,534), X_MASK, PPCCOM, 0, {RT, RA0, RB}},
5789 {"lbrx", X(31,534), X_MASK, PWRCOM, 0, {RT, RA, RB}},
5791 {"lfsx", X(31,535), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
5793 {"srw", XRC(31,536,0), X_MASK, PPCCOM, 0, {RA, RS, RB}},
5794 {"sr", XRC(31,536,0), X_MASK, PWRCOM, 0, {RA, RS, RB}},
5795 {"srw.", XRC(31,536,1), X_MASK, PPCCOM, 0, {RA, RS, RB}},
5796 {"sr.", XRC(31,536,1), X_MASK, PWRCOM, 0, {RA, RS, RB}},
5798 {"rrib", XRC(31,537,0), X_MASK, M601, 0, {RA, RS, RB}},
5799 {"rrib.", XRC(31,537,1), X_MASK, M601, 0, {RA, RS, RB}},
5804 {"srd", XRC(31,539,0), X_MASK, PPC64, 0, {RA, RS, RB}},
5805 {"srd.", XRC(31,539,1), X_MASK, PPC64, 0, {RA, RS, RB}},
5807 {"maskir", XRC(31,541,0), X_MASK, M601, 0, {RA, RS, RB}},
5808 {"maskir.", XRC(31,541,1), X_MASK, M601, 0, {RA, RS, RB}},
5810 {"lhdcbx", X(31,546), X_MASK, E200Z4, 0, {RT, RA, RB}},
5811 {"lhdx", X(31,547), X_MASK, E500MC, 0, {RT, RA, RB}},
5813 {"lvtrx", X(31,549), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5815 {"bbelr", X(31,550), X_MASK, PPCBRLK, 0, {0}},
5817 {"lvrx", X(31,551), X_MASK, CELL, 0, {VD, RA0, RB}},
5827 {"lfsux", X(31,567), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
5834 {"lwdcbx", X(31,578), X_MASK, E200Z4, 0, {RT, RA, RB}},
5835 {"lwdx", X(31,579), X_MASK, E500MC, 0, {RT, RA, RB}},
5837 {"lvtlx", X(31,581), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5839 {"lwat", X(31,582), X_MASK, POWER9, 0, {RT, RA0, FC}},
5847 {"lswi", X(31,597), X_MASK, PPCCOM, E500|E500MC, {RT, RAX, NBI}},
5848 {"lsi", X(31,597), X_MASK, PWRCOM, 0, {RT, RA0, NB}},
5860 {"lfdx", X(31,599), X_MASK, COM, PPCEFS, {FRT, RA0, RB}},
5863 {"lfdepx", X(31,607), X_MASK, E500MC|PPCA2, 0, {FRT, RA0, RB}},
5865 {"lddx", X(31,611), X_MASK, E500MC, 0, {RT, RA, RB}},
5867 {"lvswx", X(31,613), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
5869 {"ldat", X(31,614), X_MASK, POWER9, 0, {RT, RA0, FC}},
5879 {"mfsri", X(31,627), X_MASK, M601, 0, {RT, RA, RB}},
5883 {"lfdux", X(31,631), X_MASK, COM, PPCEFS, {FRT, RAS, RB}},
5885 {"stbdcbx", X(31,642), X_MASK, E200Z4, 0, {RS, RA, RB}},
5886 {"stbdx", X(31,643), X_MASK, E500MC, 0, {RS, RA, RB}},
5888 {"stvlx", X(31,647), X_MASK, CELL, 0, {VS, RA0, RB}},
5907 {"stdbrx", X(31,660), X_MASK, CELL|POWER7|PPCA2, 0, {RS, RA0, RB}},
5909 {"stswx", X(31,661), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, RB}},
5910 {"stsx", X(31,661), X_MASK, PWRCOM, 0, {RS, RA0, RB}},
5912 {"stwbrx", X(31,662), X_MASK, PPCCOM, 0, {RS, RA0, RB}},
5913 {"stbrx", X(31,662), X_MASK, PWRCOM, 0, {RS, RA0, RB}},
5915 {"stfsx", X(31,663), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
5917 {"srq", XRC(31,664,0), X_MASK, M601, 0, {RA, RS, RB}},
5918 {"srq.", XRC(31,664,1), X_MASK, M601, 0, {RA, RS, RB}},
5920 {"sre", XRC(31,665,0), X_MASK, M601, 0, {RA, RS, RB}},
5921 {"sre.", XRC(31,665,1), X_MASK, M601, 0, {RA, RS, RB}},
5923 {"sthdcbx", X(31,674), X_MASK, E200Z4, 0, {RS, RA, RB}},
5924 {"sthdx", X(31,675), X_MASK, E500MC, 0, {RS, RA, RB}},
5926 {"stvfrx", X(31,677), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
5928 {"stvrx", X(31,679), X_MASK, CELL, 0, {VS, RA0, RB}},
5934 {"stbcx.", XRC(31,694,1), X_MASK, POWER8|E6500, 0, {RS, RA0, RB}},
5936 {"stfsux", X(31,695), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
5938 {"sriq", XRC(31,696,0), X_MASK, M601, 0, {RA, RS, SH}},
5939 {"sriq.", XRC(31,696,1), X_MASK, M601, 0, {RA, RS, SH}},
5941 {"stwdcbx", X(31,706), X_MASK, E200Z4, 0, {RS, RA, RB}},
5942 {"stwdx", X(31,707), X_MASK, E500MC, 0, {RS, RA, RB}},
5944 {"stvflx", X(31,709), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
5946 {"stwat", X(31,710), X_MASK, POWER9, 0, {RS, RA0, FC}},
5964 {"stswi", X(31,725), X_MASK, PPCCOM, E500|E500MC, {RS, RA0, NB}},
5965 {"stsi", X(31,725), X_MASK, PWRCOM, 0, {RS, RA0, NB}},
5967 {"sthcx.", XRC(31,726,1), X_MASK, POWER8|E6500, 0, {RS, RA0, RB}},
5969 {"stfdx", X(31,727), X_MASK, COM, PPCEFS, {FRS, RA0, RB}},
5971 {"srlq", XRC(31,728,0), X_MASK, M601, 0, {RA, RS, RB}},
5972 {"srlq.", XRC(31,728,1), X_MASK, M601, 0, {RA, RS, RB}},
5974 {"sreq", XRC(31,729,0), X_MASK, M601, 0, {RA, RS, RB}},
5975 {"sreq.", XRC(31,729,1), X_MASK, M601, 0, {RA, RS, RB}},
5978 {"stfdepx", X(31,735), X_MASK, E500MC|PPCA2, 0, {FRS, RA0, RB}},
5980 {"stddx", X(31,739), X_MASK, E500MC, 0, {RS, RA, RB}},
5982 {"stvswx", X(31,741), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
5984 {"stdat", X(31,742), X_MASK, POWER9, 0, {RS, RA0, FC}},
6015 {"stfdux", X(31,759), X_MASK, COM, PPCEFS, {FRS, RAS, RB}},
6017 {"srliq", XRC(31,760,0), X_MASK, M601, 0, {RA, RS, SH}},
6018 {"srliq.", XRC(31,760,1), X_MASK, M601, 0, {RA, RS, SH}},
6020 {"lvsm", X(31,773), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
6024 {"stvepxl", X(31,775), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
6025 {"lvlxl", X(31,775), X_MASK, CELL, 0, {VD, RA0, RB}},
6036 {"modsd", X(31,777), X_MASK, POWER9, 0, {RT, RA, RB}},
6037 {"modsw", X(31,779), X_MASK, POWER9, 0, {RT, RA, RB}},
6042 {"tabortwc.", XRC(31,782,1), X_MASK, PPCHTM, 0, {TO, RA, RB}},
6046 {"lwzcix", X(31,789), X_MASK, POWER6, 0, {RT, RA0, RB}},
6048 {"lhbrx", X(31,790), X_MASK, COM, 0, {RT, RA0, RB}},
6050 {"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA0, RB}},
6051 {"lfqx", X(31,791), X_MASK, POWER2, 0, {FRT, RA, RB}},
6053 {"sraw", XRC(31,792,0), X_MASK, PPCCOM, 0, {RA, RS, RB}},
6054 {"sra", XRC(31,792,0), X_MASK, PWRCOM, 0, {RA, RS, RB}},
6055 {"sraw.", XRC(31,792,1), X_MASK, PPCCOM, 0, {RA, RS, RB}},
6056 {"sra.", XRC(31,792,1), X_MASK, PWRCOM, 0, {RA, RS, RB}},
6058 {"srad", XRC(31,794,0), X_MASK, PPC64, 0, {RA, RS, RB}},
6059 {"srad.", XRC(31,794,1), X_MASK, PPC64, 0, {RA, RS, RB}},
6061 {"lfddx", X(31,803), X_MASK, E500MC, 0, {FRT, RA, RB}},
6063 {"lvtrxl", X(31,805), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
6064 {"stvepx", X(31,807), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
6065 {"lvrxl", X(31,807), X_MASK, CELL, 0, {VD, RA0, RB}},
6070 {"tabortdc.", XRC(31,814,1), X_MASK, PPCHTM, 0, {TO, RA, RB}},
6072 {"rac", X(31,818), X_MASK, M601, 0, {RT, RA, RB}},
6074 {"erativax", X(31,819), X_MASK, PPCA2, 0, {RS, RA0, RB}},
6076 {"lhzcix", X(31,821), X_MASK, POWER6, 0, {RT, RA0, RB}},
6080 {"lfqux", X(31,823), X_MASK, POWER2, 0, {FRT, RA, RB}},
6082 {"srawi", XRC(31,824,0), X_MASK, PPCCOM, 0, {RA, RS, SH}},
6083 {"srai", XRC(31,824,0), X_MASK, PWRCOM, 0, {RA, RS, SH}},
6084 {"srawi.", XRC(31,824,1), X_MASK, PPCCOM, 0, {RA, RS, SH}},
6085 {"srai.", XRC(31,824,1), X_MASK, PWRCOM, 0, {RA, RS, SH}},
6090 {"lvtlxl", X(31,837), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
6100 {"tabortwci.", XRC(31,846,1), X_MASK, PPCHTM, 0, {TO, RA, HTM_SI}},
6108 {"lbzcix", X(31,853), X_MASK, POWER6, 0, {RT, RA0, RB}},
6111 {"mbar", X(31,854), X_MASK, BOOKE|PPCA2|PPC476, 0, {MO}},
6115 {"lfiwax", X(31,855), X_MASK, POWER6|PPCA2|PPC476, 0, {FRT, RA0, RB}},
6117 {"lvswxl", X(31,869), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},
6127 {"tabortdci.", XRC(31,878,1), X_MASK, PPCHTM, 0, {TO, RA, HTM_SI}},
6131 {"ldcix", X(31,885), X_MASK, POWER6, 0, {RT, RA0, RB}},
6135 {"lfiwzx", X(31,887), X_MASK, POWER7|PPCA2, 0, {FRT, RA0, RB}},
6142 {"stvlxl", X(31,903), X_MASK, CELL, 0, {VS, RA0, RB}},
6155 {"tlbsx", XRC(31,914,0), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}},
6156 {"tlbsx.", XRC(31,914,1), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RTO, RA0, RB}},
6161 {"stwcix", X(31,917), X_MASK, POWER6, 0, {RS, RA0, RB}},
6163 {"sthbrx", X(31,918), X_MASK, COM, 0, {RS, RA0, RB}},
6165 {"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA0, RB}},
6166 {"stfqx", X(31,919), X_MASK, POWER2, 0, {FRS, RA0, RB}},
6168 {"sraq", XRC(31,920,0), X_MASK, M601, 0, {RA, RS, RB}},
6169 {"sraq.", XRC(31,920,1), X_MASK, M601, 0, {RA, RS, RB}},
6171 {"srea", XRC(31,921,0), X_MASK, M601, 0, {RA, RS, RB}},
6172 {"srea.", XRC(31,921,1), X_MASK, M601, 0, {RA, RS, RB}},
6179 {"stfddx", X(31,931), X_MASK, E500MC, 0, {FRS, RA, RB}},
6181 {"stvfrxl", X(31,933), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
6185 {"wclr", X(31,934), X_MASK, PPCA2, 0, {L2, RA0, RB}},
6187 {"stvrxl", X(31,935), X_MASK, CELL, 0, {VS, RA0, RB}},
6201 {"tlbre", X(31,946), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
6203 {"sthcix", X(31,949), X_MASK, POWER6, 0, {RS, RA0, RB}},
6205 {"icswepx", XRC(31,950,0), X_MASK, PPCA2, 0, {RS, RA, RB}},
6206 {"icswepx.", XRC(31,950,1), X_MASK, PPCA2, 0, {RS, RA, RB}},
6208 {"stfqux", X(31,951), X_MASK, POWER2, 0, {FRS, RA, RB}},
6210 {"sraiq", XRC(31,952,0), X_MASK, M601, 0, {RA, RS, SH}},
6211 {"sraiq.", XRC(31,952,1), X_MASK, M601, 0, {RA, RS, SH}},
6216 {"stvflxl", X(31,965), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
6233 {"tlbwe", X(31,978), X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0, {RSO, RAOPT, SHO}},
6237 {"stbcix", X(31,981), X_MASK, POWER6, 0, {RS, RA0, RB}},
6241 {"stfiwx", X(31,983), X_MASK, PPC, PPCEFS, {FRS, RA0, RB}},
6248 {"stvswxl", X(31,997), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
6267 {"stdcix", X(31,1013), X_MASK, POWER6, 0, {RS, RA0, RB}},
6357 {"dadd", XRC(59,2,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6358 {"dadd.", XRC(59,2,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6400 {"dmul", XRC(59,34,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6401 {"dmul.", XRC(59,34,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6418 {"dcmpo", X(59,130), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
6420 {"dtstex", X(59,162), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
6427 {"dctdp", XRC(59,258,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6428 {"dctdp.", XRC(59,258,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6430 {"dctfix", XRC(59,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6431 {"dctfix.", XRC(59,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6433 {"ddedpd", XRC(59,322,0), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},
6434 {"ddedpd.", XRC(59,322,1), X_MASK, POWER6, PPCVLE, {SP, FRT, FRB}},
6436 {"dxex", XRC(59,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6437 {"dxex.", XRC(59,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6439 {"dsub", XRC(59,514,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6440 {"dsub.", XRC(59,514,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6442 {"ddiv", XRC(59,546,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6443 {"ddiv.", XRC(59,546,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6445 {"dcmpu", X(59,642), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
6447 {"dtstsf", X(59,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRB}},
6448 {"dtstsfi", X(59,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRB}},
6450 {"drsp", XRC(59,770,0), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6451 {"drsp.", XRC(59,770,1), X_MASK, POWER6, PPCVLE, {FRT, FRB}},
6453 {"dcffix", XRC(59,802,0), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}},
6454 {"dcffix.", XRC(59,802,1), X_MASK|FRA_MASK, POWER7, PPCVLE, {FRT, FRB}},
6456 {"denbcd", XRC(59,834,0), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}},
6457 {"denbcd.", XRC(59,834,1), X_MASK, POWER6, PPCVLE, {S, FRT, FRB}},
6462 {"diex", XRC(59,866,0), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6463 {"diex.", XRC(59,866,1), X_MASK, POWER6, PPCVLE, {FRT, FRA, FRB}},
6684 {"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6685 {"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6690 {"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6691 {"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6696 {"fcpsgn", XRC(63,8,0), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}},
6697 {"fcpsgn.", XRC(63,8,1), X_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FRT, FRA, FRB}},
6770 {"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6771 {"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6776 {"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6777 {"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6807 {"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6811 {"dcmpoq", X(63,130), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},
6830 {"dtstexq", X(63,162), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},
6840 {"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
6841 {"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
6846 {"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
6847 {"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
6849 {"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},
6850 {"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}},
6852 {"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
6853 {"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}},
6855 {"xsmaddqp", XRC(63,388,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6856 {"xsmaddqpo", XRC(63,388,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6861 {"xsmsubqp", XRC(63,420,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6862 {"xsmsubqpo", XRC(63,420,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6867 {"xsnmaddqp", XRC(63,452,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6868 {"xsnmaddqpo", XRC(63,452,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6873 {"xsnmsubqp", XRC(63,484,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6874 {"xsnmsubqpo", XRC(63,484,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6879 {"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6880 {"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6882 {"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6883 {"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6885 {"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6886 {"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}},
6888 {"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6889 {"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6901 {"dcmpuq", X(63,642), X_MASK, POWER6, PPCVLE, {BF, FRAp, FRBp}},
6905 {"dtstsfq", X(63,674), X_MASK, POWER6, PPCVLE, {BF, FRA, FRBp}},
6906 {"dtstsfiq", X(63,675), X_MASK|1<<22,POWER9, PPCVLE, {BF, UIM6, FRBp}},
6908 {"xststdcqp", X(63,708), X_MASK, PPCVSX3, PPCVLE, {BF, VB, DCMX}},
6915 {"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}},
6916 {"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}},
6918 {"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
6919 {"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}},
6939 {"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}},
6940 {"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}},
6952 {"fmrgow", X(63,838), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}},
6959 {"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}},
6960 {"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}},
6962 {"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6970 {"fmrgew", X(63,966), X_MASK, PPCVSX2, PPCVLE, {FRT, FRA, FRB}},
7152 {"e_cmph", X(31,14), X_MASK, PPCVLE, 0, {CRD, RA, RB}},
7153 {"e_cmphl", X(31,46), X_MASK, PPCVLE, 0, {CRD, RA, RB}},