Lines Matching defs:xc
130 static u32 xive_scan_interrupts(struct xive_cpu *xc, bool just_peek)
136 while (xc->pending_prio != 0) {
139 prio = ffs(xc->pending_prio) - 1;
143 irq = xive_read_eq(&xc->queue[prio], just_peek);
161 xc->pending_prio &= ~(1 << prio);
168 q = &xc->queue[prio];
183 if (prio != xc->cppr) {
185 xc->cppr = prio;
244 struct xive_cpu *xc = per_cpu(xive_cpu, cpu);
247 if (xc) {
248 xmon_printf("pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr);
252 u64 val = xive_esb_read(&xc->ipi_data, XIVE_ESB_GET);
254 xmon_printf("IPI=0x%08x PQ=%c%c ", xc->hw_ipi,
259 xive_dump_eq("EQ", &xc->queue[xive_irq_priority]);
310 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
327 xive_ops->update_pending(xc);
329 DBG_VERBOSE("get_irq: pending=%02x\n", xc->pending_prio);
332 irq = xive_scan_interrupts(xc, false);
335 irq, xc->pending_prio);
353 static void xive_do_queue_eoi(struct xive_cpu *xc)
355 if (xive_scan_interrupts(xc, true) != 0) {
356 DBG_VERBOSE("eoi: pending=0x%02x\n", xc->pending_prio);
415 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
418 d->irq, irqd_to_hwirq(d), xc->pending_prio);
437 xive_do_queue_eoi(xc);
479 struct xive_cpu *xc = per_cpu(xive_cpu, cpu);
480 struct xive_q *q = &xc->queue[xive_irq_priority];
503 struct xive_cpu *xc = per_cpu(xive_cpu, cpu);
504 struct xive_q *q = &xc->queue[xive_irq_priority];
506 if (WARN_ON(cpu < 0 || !xc)) {
507 pr_err("%s: cpu=%d xc=%p\n", __func__, cpu, xc);
584 struct xive_cpu *xc = per_cpu(xive_cpu, cpu);
585 if (xc->chip_id == xd->src_chip)
1090 struct xive_cpu *xc;
1093 xc = per_cpu(xive_cpu, cpu);
1096 smp_processor_id(), cpu, xc->hw_ipi);
1098 xd = &xc->ipi_data;
1111 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
1114 if (!xc)
1118 d->irq, irqd_to_hwirq(d), xc->hw_ipi, xc->pending_prio);
1120 xive_do_source_eoi(xc->hw_ipi, &xc->ipi_data);
1121 xive_do_queue_eoi(xc);
1161 struct xive_cpu *xc;
1166 xc = per_cpu(xive_cpu, cpu);
1169 if (xc->hw_ipi != XIVE_BAD_IRQ)
1172 /* Grab an IPI from the backend, this will populate xc->hw_ipi */
1173 if (xive_ops->get_ipi(cpu, xc))
1180 rc = xive_ops->populate_irq_data(xc->hw_ipi, &xc->ipi_data);
1185 rc = xive_ops->configure_irq(xc->hw_ipi,
1193 xc->hw_ipi, xive_ipi_irq, xc->ipi_data.trig_mmio);
1196 xive_do_source_set_mask(&xc->ipi_data, false);
1201 static void xive_cleanup_cpu_ipi(unsigned int cpu, struct xive_cpu *xc)
1206 if (xc->hw_ipi == XIVE_BAD_IRQ)
1210 xive_do_source_set_mask(&xc->ipi_data, true);
1219 xive_ops->configure_irq(xc->hw_ipi, hard_smp_processor_id(),
1223 xive_ops->put_ipi(cpu, xc);
1329 static void xive_cleanup_cpu_queues(unsigned int cpu, struct xive_cpu *xc)
1331 if (xc->queue[xive_irq_priority].qpage)
1332 xive_ops->cleanup_queue(cpu, xc, xive_irq_priority);
1335 static int xive_setup_cpu_queues(unsigned int cpu, struct xive_cpu *xc)
1340 if (!xc->queue[xive_irq_priority].qpage)
1341 rc = xive_ops->setup_queue(cpu, xc, xive_irq_priority);
1348 struct xive_cpu *xc;
1350 xc = per_cpu(xive_cpu, cpu);
1351 if (!xc) {
1354 xc = kzalloc_node(sizeof(struct xive_cpu),
1356 if (!xc)
1360 xc->chip_id = of_get_ibm_chip_id(np);
1362 xc->hw_ipi = XIVE_BAD_IRQ;
1364 per_cpu(xive_cpu, cpu) = xc;
1368 return xive_setup_cpu_queues(cpu, xc);
1373 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
1377 xive_ops->setup_cpu(smp_processor_id(), xc);
1380 xc->cppr = 0xff;
1409 static void xive_flush_cpu_queue(unsigned int cpu, struct xive_cpu *xc)
1417 while ((irq = xive_scan_interrupts(xc, false)) != 0) {
1466 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
1473 xc->cppr = 0;
1477 xive_flush_cpu_queue(cpu, xc);
1480 xc->cppr = 0xff;
1486 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
1490 xive_flush_cpu_queue(cpu, xc);
1499 struct xive_cpu *xc = __this_cpu_read(xive_cpu);
1503 xc->cppr = 0;
1507 xive_ops->teardown_cpu(cpu, xc);
1511 xive_cleanup_cpu_ipi(cpu, xc);
1515 xive_cleanup_cpu_queues(cpu, xc);
1577 struct xive_cpu *xc = per_cpu(xive_cpu, cpu);
1580 if (xc) {
1581 seq_printf(m, "pp=%02x CPPR=%02x ", xc->pending_prio, xc->cppr);
1585 u64 val = xive_esb_read(&xc->ipi_data, XIVE_ESB_GET);
1587 seq_printf(m, "IPI=0x%08x PQ=%c%c ", xc->hw_ipi,
1593 struct xive_q *q = &xc->queue[xive_irq_priority];