Lines Matching refs:setbits32
32 setbits32(&rcpm_v1_regs->cpmimr, mask);
33 setbits32(&rcpm_v1_regs->cpmcimr, mask);
34 setbits32(&rcpm_v1_regs->cpmmcmr, mask);
35 setbits32(&rcpm_v1_regs->cpmnmimr, mask);
43 setbits32(&rcpm_v2_regs->tpmimr0, mask);
44 setbits32(&rcpm_v2_regs->tpmcimr0, mask);
45 setbits32(&rcpm_v2_regs->tpmmcmr0, mask);
46 setbits32(&rcpm_v2_regs->tpmnmimr0, mask);
74 setbits32(&rcpm_v1_regs->ippdexpcr, mask);
82 setbits32(&rcpm_v2_regs->ippdexpcr[0], mask);
94 setbits32(&rcpm_v1_regs->cdozcr, mask);
97 setbits32(&rcpm_v1_regs->cnapcr, mask);
113 setbits32(&rcpm_v2_regs->tph10setr0, 1 << hw_cpu);
116 setbits32(&rcpm_v2_regs->pcph15setr, mask);
119 setbits32(&rcpm_v2_regs->pcph20setr, mask);
122 setbits32(&rcpm_v2_regs->pcph30setr, mask);
195 setbits32(&rcpm_v2_regs->tph10clrr0, 1 << hw_cpu);
198 setbits32(&rcpm_v2_regs->pcph15clrr, mask);
201 setbits32(&rcpm_v2_regs->pcph20clrr, mask);
204 setbits32(&rcpm_v2_regs->pcph30clrr, mask);
225 setbits32(pmcsr_reg, RCPM_POWMGTCSR_SLP);
252 setbits32(pmcsr_reg, RCPM_POWMGTCSR_P_LPM20_ST);
254 setbits32(pmcsr_reg, RCPM_POWMGTCSR_LPM20_RQ);
292 setbits32(tben_reg, mask);