Lines Matching refs:pe
104 struct pnv_ioda_pe *pe;
117 pe = &phb->ioda.pe_array[pdn->pe_number];
122 return pe;
265 struct pnv_ioda_pe *pe[NV_NPU_MAX_PE_NUM];
283 if (!npucomp->pe_num || !npucomp->pe[0] ||
284 !npucomp->pe[0]->table_group.ops ||
285 !npucomp->pe[0]->table_group.ops->create_table)
288 return npucomp->pe[0]->table_group.ops->create_table(
289 &npucomp->pe[0]->table_group, num, page_shift,
302 struct pnv_ioda_pe *pe = npucomp->pe[i];
304 if (!pe->table_group.ops->set_window)
307 ret = pe->table_group.ops->set_window(&pe->table_group,
315 struct pnv_ioda_pe *pe = npucomp->pe[j];
317 if (!pe->table_group.ops->unset_window)
320 ret = pe->table_group.ops->unset_window(
321 &pe->table_group, num);
341 struct pnv_ioda_pe *pe = npucomp->pe[i];
348 if (!pe->table_group.ops->unset_window)
351 ret = pe->table_group.ops->unset_window(&pe->table_group, num);
358 struct pnv_ioda_pe *pe = npucomp->pe[j];
363 if (!pe->table_group.ops->set_window)
366 ret = pe->table_group.ops->set_window(&pe->table_group,
386 struct pnv_ioda_pe *pe = npucomp->pe[i];
388 if (!pe->table_group.ops ||
389 !pe->table_group.ops->take_ownership)
391 pe->table_group.ops->take_ownership(&pe->table_group);
403 struct pnv_ioda_pe *pe = npucomp->pe[i];
405 if (!pe->table_group.ops ||
406 !pe->table_group.ops->release_ownership)
408 pe->table_group.ops->release_ownership(&pe->table_group);
422 struct pnv_ioda_pe *pe)
427 npucomp->pe[npucomp->pe_num] = pe;
432 pnv_try_setup_npu_table_group(struct pnv_ioda_pe *pe)
440 list_for_each_entry(gpdev, &pe->pbus->devices, bus_list) {
457 npucomp = pe->npucomp = kzalloc(sizeof(*npucomp), GFP_KERNEL);
464 pe->pe_number);
468 pe->table_group.max_dynamic_windows_supported;
469 compound_group->tce32_start = pe->table_group.tce32_start;
470 compound_group->tce32_size = pe->table_group.tce32_size;
471 compound_group->max_levels = pe->table_group.max_levels;
473 compound_group->pgsizes = pe->table_group.pgsizes;
489 iommu_group_put(pe->table_group.group);
492 pnv_comp_attach_table_group(npucomp, pe);
498 static struct iommu_table_group *pnv_npu_compound_attach(struct pnv_ioda_pe *pe)
504 struct pnv_ioda_pe *gpe = get_gpu_pci_dev_and_pe(pe, &gpdev);
506 WARN_ON(!(pe->flags & PNV_IODA_PE_DEV));
516 pe->table_group.ops = &pnv_pci_npu_ops;
526 table_group->pgsizes &= pe->table_group.pgsizes;
528 pnv_comp_attach_table_group(npucomp, pe);
530 list_for_each_entry(npdev, &pe->phb->hose->bus->devices, bus_list) {
546 struct pnv_ioda_pe *pe;
561 list_for_each_entry(pe, &phb->ioda.pe_list, list)
562 pnv_try_setup_npu_table_group(pe);
578 list_for_each_entry(pe, &phb->ioda.pe_list, list) {
584 pe->table_group.pgsizes = pgsizes;
585 pnv_npu_compound_attach(pe);