Lines Matching refs:hose
92 /* Lookup the "bus-range" property for the hose */
139 struct pci_controller *hose;
141 hose = pci_bus_to_host(bus);
142 if (hose == NULL)
145 if (bus->number == hose->first_busno) {
154 out_le32(hose->cfg_addr, caddr);
155 } while (in_le32(hose->cfg_addr) != caddr);
158 return hose->cfg_data + offset;
203 static void __init setup_chaos(struct pci_controller *hose,
207 hose->ops = &chaos_pci_ops;
208 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
209 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
228 static int u3_ht_skip_device(struct pci_controller *hose,
244 busdn = hose->dn;
269 static void __iomem *u3_ht_cfg_access(struct pci_controller *hose, u8 bus,
273 if (bus == hose->first_busno) {
275 return hose->cfg_data + U3_HT_CFA0(devfn, offset);
277 return ((void __iomem *)hose->cfg_addr) + (offset << 2);
279 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
285 struct pci_controller *hose;
289 hose = pci_bus_to_host(bus);
290 if (hose == NULL)
294 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap);
298 switch (u3_ht_skip_device(hose, bus, devfn)) {
336 struct pci_controller *hose;
340 hose = pci_bus_to_host(bus);
341 if (hose == NULL)
345 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap);
349 switch (u3_ht_skip_device(hose, bus, devfn)) {
399 struct pci_controller *hose;
405 hose = pci_bus_to_host(bus);
406 if (!hose)
409 if (bus->number == hose->first_busno) {
416 out_le32(hose->cfg_addr, caddr);
417 } while (in_le32(hose->cfg_addr) != caddr);
420 return hose->cfg_data + offset;
449 * N.B. we could clean this up using the hose ops directly.
493 struct pci_controller* hose;
507 * So we must use OF walking to find out hose
509 hose = pci_find_hose_for_OF_device(p2pbridge);
510 if (!hose) {
511 DBG("Can't find hose for PCI<->PCI bridge\n");
514 if (early_read_config_word(hose, bus, devfn,
521 early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val);
539 struct pci_controller* hose =
541 if (!hose) {
542 printk(KERN_ERR "Can't find PCI hose for OHare2 !\n");
546 early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd);
549 early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd);
566 struct pci_controller *hose;
588 hose = pci_find_hose_for_OF_device(nec);
589 if (!hose)
591 early_read_config_dword(hose, bus, devfn, 0xe4, &data);
596 early_write_config_dword(hose, bus, devfn, 0xe4, data);
601 static void __init setup_bandit(struct pci_controller *hose,
604 hose->ops = ¯isc_pci_ops;
605 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
606 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
607 init_bandit(hose);
610 static int __init setup_uninorth(struct pci_controller *hose,
615 hose->ops = ¯isc_pci_ops;
616 hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
617 hose->cfg_data = ioremap(addr->start + 0xc00000, 0x1000);
624 static void __init setup_u3_agp(struct pci_controller* hose)
635 hose->first_busno = 0xf0;
636 hose->last_busno = 0xff;
638 hose->ops = ¯isc_pci_ops;
639 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);
640 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);
641 u3_agp = hose;
644 static void __init setup_u4_pcie(struct pci_controller* hose)
649 hose->ops = &u4_pcie_pci_ops;
650 hose->cfg_addr = ioremap(0xf0000000 + 0x800000, 0x1000);
651 hose->cfg_data = ioremap(0xf0000000 + 0xc00000, 0x1000);
659 hose->first_busno = 0x00;
660 hose->last_busno = 0xff;
663 static void __init parse_region_decode(struct pci_controller *hose,
687 hose->mem_resources[cur].flags = IORESOURCE_MEM;
688 hose->mem_resources[cur].name = hose->dn->full_name;
689 hose->mem_resources[cur].start = base;
690 hose->mem_resources[cur].end = end;
691 hose->mem_offset[cur] = 0;
695 hose->mem_resources[cur].end = end;
701 static void __init setup_u3_ht(struct pci_controller* hose)
703 struct device_node *np = hose->dn;
707 hose->ops = &u3_ht_pci_ops;
720 hose->cfg_data = ioremap(cfg_res.start, 0x02000000);
721 hose->cfg_addr = ioremap(self_res.start, resource_size(&self_res));
728 hose->io_base_phys = 0xf4000000;
729 hose->pci_io_size = 0x00400000;
730 hose->io_resource.name = np->full_name;
731 hose->io_resource.start = 0;
732 hose->io_resource.end = 0x003fffff;
733 hose->io_resource.flags = IORESOURCE_IO;
734 hose->first_busno = 0;
735 hose->last_busno = 0xef;
738 decode = in_be32(hose->cfg_addr + 0x80);
762 parse_region_decode(hose, decode);
774 struct pci_controller *hose;
792 hose = pcibios_alloc_controller(dev);
793 if (!hose)
795 hose->first_busno = bus_range ? bus_range[0] : 0;
796 hose->last_busno = bus_range ? bus_range[1] : 0xff;
797 hose->controller_ops = pmac_pci_controller_ops;
804 setup_u3_agp(hose);
808 setup_u3_ht(hose);
812 setup_u4_pcie(hose);
817 " %d->%d\n", disp_name, hose->first_busno, hose->last_busno);
823 primary = setup_uninorth(hose, &rsrc);
827 setup_grackle(hose);
830 setup_bandit(hose, &rsrc);
833 setup_chaos(hose, &rsrc);
839 disp_name, (unsigned long long)rsrc.start, hose->first_busno,
840 hose->last_busno);
844 hose, hose->cfg_addr, hose->cfg_data);
848 pci_process_bridge_OF_ranges(hose, dev, primary);
878 struct pci_controller *hose = pci_bus_to_host(bridge->bus);
881 if (hose != u3_agp)
889 np = hose->dn;