Lines Matching refs:fcr
163 unsigned long fcr;
189 fcr = MACIO_IN32(OHARE_FCR);
191 if (!(fcr & OH_SCC_ENABLE)) {
192 fcr |= OH_SCC_ENABLE;
200 fcr &= ~HRW_SCC_TRANS_EN_N;
201 MACIO_OUT32(OHARE_FCR, fcr);
202 fcr |= (rmask = HRW_RESET_SCC);
203 MACIO_OUT32(OHARE_FCR, fcr);
205 fcr |= (rmask = OH_SCC_RESET);
206 MACIO_OUT32(OHARE_FCR, fcr);
212 fcr &= ~rmask;
213 MACIO_OUT32(OHARE_FCR, fcr);
216 fcr |= OH_SCCA_IO;
218 fcr |= OH_SCCB_IO;
219 MACIO_OUT32(OHARE_FCR, fcr);
228 fcr = MACIO_IN32(OHARE_FCR);
230 fcr &= ~OH_SCCA_IO;
232 fcr &= ~OH_SCCB_IO;
233 MACIO_OUT32(OHARE_FCR, fcr);
234 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
235 fcr &= ~OH_SCC_ENABLE;
237 fcr |= HRW_SCC_TRANS_EN_N;
238 MACIO_OUT32(OHARE_FCR, fcr);
603 u32 fcr;
620 fcr = MACIO_IN32(KEYLARGO_FCR0);
622 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
623 fcr |= KL0_SCC_CELL_ENABLE;
627 fcr |= KL0_SCCA_ENABLE;
630 fcr &= ~KL0_SCC_A_INTF_ENABLE;
632 fcr |= KL0_SCC_A_INTF_ENABLE;
635 fcr |= KL0_SCCB_ENABLE;
638 fcr &= ~KL0_SCC_B_INTF_ENABLE;
639 fcr |= KL0_IRDA_ENABLE;
640 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
641 fcr |= KL0_IRDA_SOURCE1_SEL;
642 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
643 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
646 fcr |= KL0_SCC_B_INTF_ENABLE;
648 MACIO_OUT32(KEYLARGO_FCR0, fcr);
673 fcr = MACIO_IN32(KEYLARGO_FCR0);
675 fcr &= ~KL0_SCCA_ENABLE;
677 fcr &= ~KL0_SCCB_ENABLE;
680 fcr &= ~KL0_IRDA_ENABLE;
681 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
682 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
683 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
686 MACIO_OUT32(KEYLARGO_FCR0, fcr);
687 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
688 fcr &= ~KL0_SCC_CELL_ENABLE;
689 MACIO_OUT32(KEYLARGO_FCR0, fcr);