Lines Matching refs:mbase
1236 void __iomem *mbase;
1241 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1242 if (mbase == NULL) {
1248 while (attempt && (0 == (in_le32(mbase + PECFG_460SX_DLLSTA)
1255 iounmap(mbase);
1374 void __iomem *mbase = ioremap(port->cfg_space.start + 0x10000000,
1379 if (mbase == NULL) {
1386 val = in_le32(mbase + PECFG_TLDLP);
1399 iounmap(mbase);
1710 void __iomem *mbase,
1737 out_le32(mbase + PECFG_POM0LAH, pciah);
1738 out_le32(mbase + PECFG_POM0LAL, pcial);
1760 out_le32(mbase + PECFG_POM1LAH, pciah);
1761 out_le32(mbase + PECFG_POM1LAL, pcial);
1769 out_le32(mbase + PECFG_POM2LAH, pciah);
1770 out_le32(mbase + PECFG_POM2LAL, pcial);
1786 void __iomem *mbase)
1805 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1823 if (ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1833 ppc4xx_setup_one_pciex_POM(port, hose, mbase,
1840 void __iomem *mbase,
1859 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1860 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
1864 out_le32(mbase + PECFG_BAR1MPA, 0);
1865 out_le32(mbase + PECFG_BAR2HMPA, 0);
1866 out_le32(mbase + PECFG_BAR2LMPA, 0);
1868 out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
1869 out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
1871 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
1872 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
1886 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
1887 out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
1892 out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
1893 out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
1894 out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
1895 out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
1896 out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
1897 out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
1899 out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
1900 out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
1904 out_le32(mbase + PECFG_PIMEN, 0x1);
1907 out_le16(mbase + PCI_COMMAND,
1908 in_le16(mbase + PCI_COMMAND) |
1918 void __iomem *mbase = NULL, *cfg_data = NULL;
1972 mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
1973 if (mbase == NULL) {
1978 hose->cfg_addr = mbase;
1988 mbase = (void __iomem *)hose->cfg_addr;
1994 out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
1995 out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
1996 out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
2002 out_le32(mbase + PECFG_PIMEN, 0);
2008 if (ppc4xx_parse_dma_ranges(hose, mbase, &dma_window) != 0)
2012 ppc4xx_configure_pciex_POMs(port, hose, mbase);
2015 ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
2034 out_le16(mbase + 0x200, val);
2045 out_le16(mbase + 0x202, val);
2049 out_le16(mbase + 0x204, 0x7);
2053 out_le32(mbase + 0x208, 0x06040001);
2059 out_le32(mbase + 0x208, 0x0b200001);
2071 if (mbase)
2072 iounmap(mbase);