Lines Matching refs:mfdcr
72 pr_err("GESR0: 0x%08x\n", mfdcr(base + PLB4OPB_GESR0));
73 pr_err("GESR1: 0x%08x\n", mfdcr(base + PLB4OPB_GESR1));
74 pr_err("GESR2: 0x%08x\n", mfdcr(base + PLB4OPB_GESR2));
75 pr_err("GEARU: 0x%08x\n", mfdcr(base + PLB4OPB_GEARU));
76 pr_err("GEAR: 0x%08x\n", mfdcr(base + PLB4OPB_GEAR));
86 pr_err("BC_SHD: 0x%08x\n", mfdcr(DCRN_PLB6_SHD));
87 pr_err("BC_ERR: 0x%08x\n", mfdcr(DCRN_PLB6_ERR));
90 pr_err("ESR: 0x%08x\n", mfdcr(DCRN_PLB6PLB4_ESR));
91 pr_err("EARH: 0x%08x\n", mfdcr(DCRN_PLB6PLB4_EARH));
92 pr_err("EARL: 0x%08x\n", mfdcr(DCRN_PLB6PLB4_EARL));
95 pr_err("ESR: 0x%08x\n", mfdcr(DCRN_PLB4PLB6_ESR));
96 pr_err("EARH: 0x%08x\n", mfdcr(DCRN_PLB4PLB6_EARH));
97 pr_err("EARL: 0x%08x\n", mfdcr(DCRN_PLB4PLB6_EARL));
100 pr_err("BESR0: 0x%08x\n", mfdcr(DCRN_PLB6MCIF_BESR0));
101 pr_err("BESR1: 0x%08x\n", mfdcr(DCRN_PLB6MCIF_BESR1));
102 pr_err("BEARH: 0x%08x\n", mfdcr(DCRN_PLB6MCIF_BEARH));
103 pr_err("BEARL: 0x%08x\n", mfdcr(DCRN_PLB6MCIF_BEARL));
106 pr_err("P0ESRH 0x%08x\n", mfdcr(DCRN_PLB4_P0ESRH));
107 pr_err("P0ESRL 0x%08x\n", mfdcr(DCRN_PLB4_P0ESRL));
108 pr_err("P0EARH 0x%08x\n", mfdcr(DCRN_PLB4_P0EARH));
109 pr_err("P0EARH 0x%08x\n", mfdcr(DCRN_PLB4_P0EARH));
110 pr_err("P1ESRH 0x%08x\n", mfdcr(DCRN_PLB4_P1ESRH));
111 pr_err("P1ESRL 0x%08x\n", mfdcr(DCRN_PLB4_P1ESRL));
112 pr_err("P1EARH 0x%08x\n", mfdcr(DCRN_PLB4_P1EARH));
113 pr_err("P1EARH 0x%08x\n", mfdcr(DCRN_PLB4_P1EARH));
121 pr_err("ESR: 0x%08x\n", mfdcr(DCRN_PLB4AHB_ESR));
122 pr_err("SEUAR: 0x%08x\n", mfdcr(DCRN_PLB4AHB_SEUAR));
123 pr_err("SELAR: 0x%08x\n", mfdcr(DCRN_PLB4AHB_SELAR));
126 pr_err("\nESR: 0x%08x\n", mfdcr(DCRN_AHBPLB4_ESR));
127 pr_err("\nEAR: 0x%08x\n", mfdcr(DCRN_AHBPLB4_EAR));
139 pr_err("CONF_FIR: 0x%08x\n", mfdcr(DCRN_CONF_FIR_RWC));
140 pr_err("RPERR0: 0x%08x\n", mfdcr(DCRN_CONF_RPERR0));
141 pr_err("RPERR1: 0x%08x\n", mfdcr(DCRN_CONF_RPERR1));
152 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_MCSTAT));
154 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_MCOPT1));
156 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_MCOPT2));
158 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_PHYSTAT));
160 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_CFGR0));
162 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_CFGR1));
164 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_CFGR2));
166 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_CFGR3));
168 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_SCRUB_CNTL));
170 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_ECCERR_PORT0));
172 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_ECCERR_ADDR_PORT0));
174 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_ECCERR_COUNT_PORT0));
176 mfdcr(DCRN_DDR34_BASE + DCRN_DDR34_ECC_CHECK_PORT0));
178 mfdcr(DCRN_CW_BASE + DCRN_CW_MCER0));
180 mfdcr(DCRN_CW_BASE + DCRN_CW_MCER1));
182 mfdcr(DCRN_PLB6MCIF_BESR0));
184 mfdcr(DCRN_PLB6MCIF_BEARL));
186 mfdcr(DCRN_PLB6MCIF_BEARH));
251 val = mfdcr(DCRN_PLB6_CR0);